 | 2006 |
|---|
| 7 |       | Ilya Ganusov,
Martin Burtscher:
Efficient emulation of hardware prefetchers via event-driven helper threading.
PACT 2006: 144-153 |
| 6 | | Ilya Ganusov,
Martin Burtscher:
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads.
TACO 3(4): 424-449 (2006) |
| 2005 |
|---|
| 5 | | Ilya Ganusov,
Martin Burtscher:
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors.
IEEE PACT 2005: 350-360 |
| 4 | | Ilya Ganusov,
Martin Burtscher:
On the importance of optimizing the configuration of stream prefetchers.
Memory System Performance 2005: 54-61 |
| 3 | | Christianto C. Liu,
Ilya Ganusov,
Martin Burtscher,
Sandip Tiwari:
Bridging the Processor-Memory Performance Gapwith 3D IC Technology.
IEEE Design & Test of Computers 22(6): 556-564 (2005) |
| 2 | | Martin Burtscher,
Ilya Ganusov,
Sandra J. Jackson,
Jian Ke,
Paruj Ratanaworabhan,
Nana B. Sam:
The VPC Trace-Compression Algorithms.
IEEE Trans. Computers 54(11): 1329-1344 (2005) |
| 2004 |
|---|
| 1 | | Martin Burtscher,
Ilya Ganusov:
Automatic Synthesis of High-Speed Processor Simulators.
MICRO 2004: 55-66 |
