Aman Gayasen

	2008
14		Kevin M. Irick, Michael DeBole, Vijaykrishnan Narayanan, Aman Gayasen: A Hardware Efficient Support Vector Machine Architecture for FPGA. FCCM 2008: 304-305
13		Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arifur Rahman: Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues. IEEE Trans. VLSI Syst. 16(7): 882-893 (2008)
	2007
12		Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen, Narayanan Vijaykrishnan, Yehia Massoud: Assessing carbon nanotube bundle interconnect for future FPGA architectures. DATE 2007: 307-312
11		Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir: Design of power-aware FPGA fabrics. IJES 3(1/2): 52-64 (2007)
	2006
10		Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arif Rahman: Switch Box Architectures for Three-Dimensional FPGAs. FCCM 2006: 335-336
9		Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan: Thermal characterization and optimization in platform FPGAs. ICCAD 2006: 443-447
	2005
8		Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan: Leakage control in FPGA routing fabric. ASP-DAC 2005: 661-664
7		Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin: Exploring technology alternatives for nano-scale FPGA interconnects. DAC 2005: 921-926
6		Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo: Improving Java performance using dynamic method migration on FPGAs. IJES 1(3/4): 228-236 (2005)
	2004
5		Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan: Reducing leakage energy in FPGAs using region-constrained placement. FPGA 2004: 51-58
4		Aman Gayasen: Low Power Reconfigurable Devices. FPL 2004: 1169
3		Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan: A Dual-VDD Low Power FPGA Architecture. FPL 2004: 145-157
2		Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin: Improving soft-error tolerance of FPGA configuration bits. ICCAD 2004: 107-110
1		Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo: Improving Java Performance Using Dynamic Method Migration on FPGAs. IPDPS 2004

Coauthor Index

1	Luca Benini	[1] [6]
2	Alessandro Bogliolo	[1] [6]
3	Michael DeBole	[14]
4	Soumya Eachempati	[12]
5	Kevin M. Irick	[14]
6	Mary Jane Irwin	[2] [3] [5] [7]
7	Mahmut T. Kandemir	[1] [2] [3] [5] [6] [10] [11] [13]
8	Emanuele Lattanzi	[1] [6]
9	K. Lee	[3]
10	Yehia Massoud	[12]
11	Arthur Nieuwoudt	[12]
12	Arif Rahman	[10]
13	Arifur Rahman	[13]
14	Suresh Srinivasan	[2] [8] [11]
15	Priya Sundararajan	[9]
16	Yuh-Fang Tsai	[5]
17	Tim Tuan	[3] [5] [8] [9]
18	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
19	Yuan Xie	[2]