| 2006 | ||
|---|---|---|
| 2 | Philippe Georgelin, Venkat Krishnaswamy: Towards a C++-based design methodology facilitating sequential equivalence checking. DAC 2006: 93-96 | |
| 2000 | ||
| 1 | Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin: Using the ACL2 Theorem Prover to Reason about VHDL Components. RITA 7(1): 129-148 (2000) | |
| 1 | Dominique Borrione | [1] |
| 2 | Venkat Krishnaswamy | [2] |
| 3 | Vanderlei Moraes Rodrigues | [1] |