Tony Givargis

	2009
48		Mohammad Ali Ghodrat, Tony Givargis: Efficient dynamic voltage/frequency scaling through algorithmic loop transformation. CODES+ISSS 2009: 203-210
47		Sai Krishna Mylavarapu, Siddharth Choudhuri, Aviral Shrivastava, Jongeun Lee, Tony Givargis: FSAF: File system aware flash translation layer for NAND Flash Memories. DATE 2009: 399-404
46		Siddharth Choudhuri, Tony Givargis: FlashBox: a system for logging non-deterministic events in deployed embedded systems. SAC 2009: 1676-1682
	2008
45		Uwe Brinkschulte, Tony Givargis, Stefano Russo: Software Technologies for Embedded and Ubiquitous Systems, 6th IFIP WG 10.2 International Workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008, Proceedings Springer 2008
44		Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau: Control flow optimization in loops using interval analysis. CASES 2008: 157-166
43		Siddharth Choudhuri, Tony Givargis: Deterministic service guarantees for nand flash using partial block cleaning. CODES+ISSS 2008: 19-24
42		Frank Vahid, Tony Givargis: Highly-cited ideas in system codesign and synthesis. CODES+ISSS 2008: 191-196
41		Siddharth Choudhuri, Tony Givargis: Real-Time Access Guarantees for NAND Flash Using Partial Block Cleaning. SEUS 2008: 138-149
40		Tony Givargis: Guest Editor Introduction: Special Issue on Embedded Processors. International Journal of Parallel Programming 36(5): 455-456 (2008)
	2007
39		Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau: Short-Circuit Compiler Transformation: Optimizing Conditional Blocks. ASP-DAC 2007: 504-510
38		Siddharth Choudhuri, Tony Givargis: System Architecture for Software Peripherals. ASP-DAC 2007: 56-61
37		Siddharth Choudhuri, Tony Givargis: Performance improvement of block based NAND flash translation layer. CODES+ISSS 2007: 257-262
36		Tony Givargis: Special Issue On Embedded Processors - Guest Editor Introduction. International Journal of Parallel Programming 35(2): 99-100 (2007)
	2006
35		Tony Givargis: Zero cost indexing for improved processor cache performance. ACM Trans. Design Autom. Electr. Syst. 11(1): 3-25 (2006)
34		André C. Nácul, Tony Givargis: Synthesis of time-constrained multitasking embedded software. ACM Trans. Design Autom. Electr. Syst. 11(4): 822-847 (2006)
33		Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau: Expression equivalence checking using interval analysis. IEEE Trans. VLSI Syst. 14(8): 830-842 (2006)
32		Cristina Videira Lopes, Amir Haghighat, Atri Mandal, Tony Givargis, Pierre Baldi: Localization of off-the-shelf mobile devices using audible sound: architectures, protocols and performance assessment. Mobile Computing and Communications Review 10(2): 38-50 (2006)
	2005
31		Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau: Equivalence checking of arithmetic expressions using fast evaluation. CASES 2005: 147-156
30		Arijit Ghosh, Tony Givargis: LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks. DATE 2005: 190-195
29		André C. Nácul, Tony Givargis: Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler. DATE 2005: 742-747
28		Tony Givargis, David Eppstein: Memory reference caching for activity reduction on address buses. Microprocessors and Microsystems 29(4): 145-153 (2005)
	2004
27		André C. Nácul, Tony Givargis: Dynamic Voltage and Cache Reconfiguration for Low Power. DATE 2004: 1376-1379
26		André C. Nácul, Tony Givargis: Code partitioning for synthesis of embedded applications with phantom. ICCAD 2004: 190-196
25		Arijit Ghosh, Tony Givargis: Cache optimization for embedded processor cores: An analytical approach. ACM Trans. Design Autom. Electr. Syst. 9(4): 419-440 (2004)
	2003
24		Tony Givargis: Improved indexing for cache miss reduction in embedded systems. DAC 2003: 875-880
23		Arijit Ghosh, Tony Givargis: Analytical Design Space Exploration of Caches for Embedded Systems. DATE 2003: 10650-10655
22		Arijit Ghosh, Tony Givargis: Cache Optimization For Embedded Processor Cores: An Analytical Approach. ICCAD 2003: 342-347
21		Marcio Buss, Tony Givargis, Nikil D. Dutt: Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores. RTSS 2003: 275-
	2002
20		Maurizio Palesi, Tony Givargis: Multi-objective design space exploration using genetic algorithms. CODES 2002: 67-72
19		Tony Givargis, Frank Vahid, Jörg Henkel: System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip. IEEE Trans. VLSI Syst. 10(4): 416-422 (2002)
18		Tony Givargis, Frank Vahid, Jörg Henkel: Instruction-based system-level power evaluation of system-on-a-chip peripheral cores. IEEE Trans. VLSI Syst. 10(6): 856-863 (2002)
17		Tony Givargis, Frank Vahid: Platune: a tuning framework for system-on-a-chip platforms. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1317-1327 (2002)
16		Frank Vahid, Tony Givargis, Susan Cotterell: Power Estimator Development for Embedded System Memory Tuning. Journal of Circuits, Systems, and Computers 11(5): 459-476 (2002)
	2001
15		Tony Givargis, Frank Vahid, Jörg Henkel: Trace-driven system-level power evaluation of system-on-a-chip peripheral cores. ASP-DAC 2001: 306-312
14		Tony Givargis, Frank Vahid, Jörg Henkel: System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip. ICCAD 2001: 25-30
13		Frank Vahid, Tony Givargis: Platform Tuning for Embedded Systems Design. IEEE Computer 34(3): 112-114 (2001)
	2000
12		Tony Givargis, Frank Vahid, Jörg Henkel: A hybrid approach for core-based system-level power modeling. ASP-DAC 2000: 141-146
11		Greg Stitt, Frank Vahid, Tony Givargis, Roman L. Lysecky: A first-step towards an architecture tuning methodology for low power. CASES 2000: 187-192
10		Tony Givargis, Frank Vahid: Parameterized system design. CODES 2000: 98-102
9		Jörg Henkel, Tony Givargis, Frank Vahid: Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design. DATE 2000: 333-
8		Roman L. Lysecky, Frank Vahid, Tony Givargis: Techniques for Reducing Read Latency of Core Bus Wrappers. DATE 2000: 84-91
7		Tony Givargis, Frank Vahid, Jörg Henkel: Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores. ISSS 2000: 163-171
6		Roman L. Lysecky, Frank Vahid, Tony Givargis: Experiments with the Peripheral Virtual Component Interface. ISSS 2000: 221-224
	1999
5		Frank Vahid, Tony Givargis: The case for a configure-and-execute paradigm. CODES 1999: 59-63
4		Tony Givargis, Jörg Henkel, Frank Vahid: Interface and cache power exploration for core-based embedded system design. ICCAD 1999: 270-273
3		Roman L. Lysecky, Frank Vahid, Rilesh Patel, Tony Givargis: Pre-Fetching for Improved Core Interfacing. ISSS 1999: 51-55
	1998
2		Tony Givargis, Frank Vahid: Interface Exploration for Reduced Power in Core-Based Systems. ISSS 1998: 117-124
1		Frank Vahid, Tony Givargis: Incorporating Cores into System-Level Specification. ISSS 1998: 43-50

Coauthor Index

1	Pierre Baldi	[32]
2	Uwe Brinkschulte	[45]
3	Marcio Buss	[21]
4	Siddharth Choudhuri	[37] [38] [41] [43] [46] [47]
5	Susan Cotterell	[16]
6	Nikil D. Dutt (Nikil Dutt)	[21]
7	David Eppstein	[28]
8	Mohammad Ali Ghodrat	[31] [33] [39] [44] [48]
9	Arijit Ghosh	[22] [23] [25] [30]
10	Amir Haghighat	[32]
11	Jörg Henkel	[4] [7] [9] [12] [14] [15] [18] [19]
12	Jongeun Lee	[47]
13	Cristina Videira Lopes	[32]
14	Roman L. Lysecky	[3] [6] [8] [11]
15	Atri Mandal	[32]
16	Sai Krishna Mylavarapu	[47]
17	André C. Nácul	[26] [27] [29] [34]
18	Alexandru Nicolau (Alex Nicolau)	[31] [33] [39] [44]
19	Maurizio Palesi	[20]
20	Rilesh Patel	[3]
21	Stefano Russo	[45]
22	Aviral Shrivastava	[47]
23	Greg Stitt	[11]
24	Frank Vahid	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [42]

Colors in the list of coauthors