| 1995 | ||
|---|---|---|
| 2 | Bruce P. Herndon, Narayan R. Aluru, Arthur Raefsky, Ronald J. G. Goossens, Kincho H. Law, Robert W. Dutton: A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation. PPSC 1995: 239-240 | |
| 1994 | ||
| 1 | Ronald J. G. Goossens, Stephen G. Beebe, Zhiping Yu, Robert W. Dutton: An automatic biasing scheme for tracing arbitrarily shaped I-V curves. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 310-317 (1994) | |
| 1 | Narayan R. Aluru | [2] |
| 2 | Stephen G. Beebe | [1] |
| 3 | Robert W. Dutton | [1] [2] |
| 4 | Bruce P. Herndon | [2] |
| 5 | Kincho H. Law | [2] |
| 6 | Arthur Raefsky | [2] |
| 7 | Zhiping Yu | [1] |