Tejaswi Gowda

	2008
3		Tejaswi Gowda, Sarma B. K. Vrudhula: Decomposition based approach for synthesis of multi-level threshold logic circuits. ASP-DAC 2008: 125-130
2		Tejaswi Gowda, Samuel Leshner, Sarma B. K. Vrudhula, Seungchan Kim: Threshold Logic Gene Regulatory Model - Prediction of Dorsal-ventral Patterning and Hardware-based Simulation of Drosophila. BIODEVICES (1) 2008: 212-219
	2007
1		Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod: Combinational equivalence checking for threshold logic circuits. ACM Great Lakes Symposium on VLSI 2007: 102-107

Coauthor Index

1	Seungchan Kim	[2]
2	Goran Konjevod	[1]
3	Samuel Leshner	[2]
4	Sarma B. K. Vrudhula	[1] [2] [3]