 | 2009 |
|---|
| 9 |       | Shantanu Gupta,
Florin Sultan,
Srihari Cadambi,
Franjo Ivancic,
Martin Rötteler:
Using hardware transactional memory for data race detection.
IPDPS 2009: 1-11 |
| 8 | | Michael D. Powell,
Arijit Biswas,
Shantanu Gupta,
Shubhendu S. Mukherjee:
Architectural core salvaging in a multi-core processor for hard-error tolerance.
ISCA 2009: 93-104 |
| 2008 |
|---|
| 7 | | Shantanu Gupta,
Shuguang Feng,
Amin Ansari,
Jason A. Blome,
Scott A. Mahlke:
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems.
CASES 2008: 1-10 |
| 6 | | Shantanu Gupta,
Shuguang Feng,
Amin Ansari,
Jason A. Blome,
Scott A. Mahlke:
The StageNet fabric for constructing resilient multicore systems.
MICRO 2008: 141-151 |
| 5 | | Shantanu Gupta,
Florin Sultan,
Srihari Cadambi,
Franjo Ivancic,
Martin Rötteler:
RaceTM: detecting data races using transactional memory.
SPAA 2008: 104-106 |
| 2007 |
|---|
| 4 | | Jaijit Bhattacharya,
P. Vigneswara Ilavarasan,
Shantanu Gupta:
Open standards and accessibility to information: a critical analysis of OOXML in India.
ICEGOV 2007: 151-154 |
| 3 | | Jason A. Blome,
Shuguang Feng,
Shantanu Gupta,
Scott A. Mahlke:
Self-calibrating Online Wearout Detection.
MICRO 2007: 109-122 |
| 2006 |
|---|
| 2 | | Jason A. Blome,
Shantanu Gupta,
Shuguang Feng,
Scott A. Mahlke:
Cost-efficient soft error protection for embedded microprocessors.
CASES 2006: 421-431 |
| 2005 |
|---|
| 1 | | Shantanu Gupta,
Tarang Vaish,
Santanu Chattopadhyay:
Flip-flop chaining architecture for power-efficient scan during test application.
Asian Test Symposium 2005: 410-413 |
