Michael Hübner

	2009
48		Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker: FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ARC 2009: 62-73
47		Juan Fernando Eusse, Michael Hübner, Ricardo Pezzuol Jacobi: BRICK: a multi-context expression grained reconfigurable architecture. SBCCI 2009
46		Katarina Paulsson, Michael Hübner, Jürgen Becker: Dynamic power optimization by exploiting self-reconfiguration in Xilinx Spartan 3-based systems. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 46-52 (2009)
	2008
45		Oliver Sander, Lars Braun, Michael Hübner, Jürgen Becker: Data reallocation by exploiting FPGA configuration mechanisms. ARC 2008: 308-313
44		Antonio Deledda, Claudio Mucci, Arseni Vitkovski, Philippe Bonnot, Arnaud Grasset, P. Millet, Matthias Kühnle, Florian Ries, Michael Hübner, Jürgen Becker, Massimo Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Fabio Campi, Tommaso DeMarco: Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor. DATE 2008: 1352-1357
43		Katarina Paulsson, Michael Hübner, Jürgen Becker: Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs. DATE 2008: 50-55
42		Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer: Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008
41		Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348
40		Diana Göhringer, Michael Hübner, Thomas Perschke, Jürgen Becker: New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. FPL 2008: 495-498
39		Christopher Claus, Bin Zhang, Walter Stechele, Lars Braun, Michael Hübner, Jürgen Becker: A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput. FPL 2008: 535-538
38		Lars Braun, Katarina Paulsson, Herrmann Krömer, Michael Hübner, Jürgen Becker: Data path driven waveform-like reconfiguration. FPL 2008: 607-610
37		Katarina Paulsson, Michael Hübner, Jürgen Becker: Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization. FPL 2008: 699-700
36		Michael Hübner, Lars Braun, Diana Göhringer, Jürgen Becker: Run-time reconfigurable adaptive multilayer network-on-chip for FPGA-based systems. IPDPS 2008: 1-6
35		Christian Schuck, Matthias Kühnle, Michael Hübner, Jürgen Becker: A framework for dynamic 2D placement on FPGAs. IPDPS 2008: 1-7
34		Diana Göhringer, Michael Hübner, Volker Schatz, Jürgen Becker: Runtime adaptive multi-processor system-on-chip: RAMPSoC. IPDPS 2008: 1-7
33		Katarina Paulsson, Ulrich Viereck, Michael Hübner, Jürgen Becker: Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs. ISVLSI 2008: 304-309
32		Juanjo Noguera, Robert Esser, Katarina Paulsson, Michael Hübner, Jürgen Becker: Towards Novel Approaches in Design Automation for FPGA Power Optimization. PATMOS 2008: 419-428
31		Matthias Kühnle, Michael Hübner, Jürgen Becker, Antonio Deledda, Claudio Mucci, Florian Ries, Marcello Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Tommaso DeMarco, Fabio Campi: An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC. IEEE Design & Test of Computers 25(5): 442-451 (2008)
	2007
30		Katarina Paulsson, Michael Hübner, Günther Auer, Michael Dreschmann, Jürgen Becker: Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs. FPL 2007: 351-356
29		Katarina Paulsson, Michael Hübner, Jürgen Becker, Jean-Marc Philippe, Christian Gamrat: On-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the ÆTHER Project. FPL 2007: 415-422
28		Lars Braun, Michael Hübner, Jürgen Becker, Thomas Perschke, Volker Schatz, Stefan Bach: Circuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications. FPL 2007: 688-691
27		Philipp Graf, Michael Hübner, Klaus D. Müller-Glaser, Jürgen Becker: A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures. FPL 2007: 722-725
26		Thilo Pionteck, Carsten Albrecht, Roman Koch, Erik Maehle, Michael Hübner, Jürgen Becker: Communication Architectures for Dynamically Reconfigurable FPGA Designs. IPDPS 2007: 1-8
25		Alisson Vasconcelos De Brito, Matthias Kühnle, Michael Hübner, Jürgen Becker, Elmar U. K. Melcher: Modelling and Simulation of Dynamic and Partially Reconfigurable Systems using SystemC. ISVLSI 2007: 35-40
24		Michael Hübner, Lars Braun, Jürgen Becker, Christopher Claus, Walter Stechele: Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs. ISVLSI 2007: 41-46
23		Katarina Paulsson, Michael Hübner, Salih Bayar, Jürgen Becker: Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. ReCoSoC 2007: 1-6
22		Jürgen Becker, Adam Donlin, Michael Hübner: New tool support and architectures in adaptive reconfigurable computing. VLSI-SoC 2007: 134-139
	2006
21		Katarina Paulsson, Michael Hübner, Jürgen Becker: Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. AHS 2006: 288-291
20		Jürgen Becker, Michael Hübner, Katarina Paulsson: Physical 2D Morphware and Power Reduction Methods for Everyone. Dynamically Reconfigurable Architectures 2006
19		Michael Hübner, Christian Schuck, Jürgen Becker: Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs. IPDPS 2006
18		Katarina Paulsson, Michael Hübner, Markus Jung, Jürgen Becker: Methods for Run-time Failure Recognition and Recovery in dynamic and partial Reconfigurable Systems Based on Xilinx Virtex-II Pro FPGAs. ISVLSI 2006: 159-166
17		Michael Hübner, Christian Schuck, Matthias Kühnle, Jürgen Becker: New 2-Dimensional Partial Dynamic Reconfiguration Techniques for Real-time Adaptive Microelectronic Circuits. ISVLSI 2006: 97-102
16		Michael Hübner, Jürgen Becker: Exploiting dynamic and partial reconfiguration for FPGAs: toolflow, architecture and system integration. SBCCI 2006: 1-4
15		Katarina Paulsson, Michael Hübner, Jürgen Becker: On-line optimization of FPGA power-dissipation by exploiting run-time adaption of communication primitives. SBCCI 2006: 173-178
14		Jürgen Becker, Michael Hübner: Run-time reconfigurabilility and other future trends. SBCCI 2006: 9-11
	2005
13		Michael Hübner, Katarina Paulsson, Marcus Stitz, Jürgen Becker: Novel Seamless Design-Flow for Partial and Dynamic Reconfigurable Systems with Customized Communication Structures based on Xilinx Virtex-II FPGAs. ARCS Workshops 2005: 39-44
12		Matthias Riebisch, Michael Hübner: Traceability-Driven Model Refinement for Test Case Generation. ECBS 2005: 113-120
11		Michael Hübner, Katarina Paulsson, Jürgen Becker: Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores. IPDPS 2005
10		Jürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas: Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics. ReCoSoC 2005: 35-42
9		Michael Ullmann, Michael Hübner, Jürgen Becker: On-demand FPGA run-time system for flexible and dynamical reconfiguration. IJES 1(3/4): 193-204 (2005)
8		Michael Hübner, Michael Ullmann, Jürgen Becker: Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation. IJES 1(3/4): 263-273 (2005)
	2004
7		Michael Hübner, Michael Ullmann, Lars Braun, A. Klausmann, Jürgen Becker: Scalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems. FPL 2004: 1037-1041
6		Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker: On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities. FPL 2004: 454-463
5		Brandon Blodget, Christophe Bobda, Michael Hübner, Adronis Niyonkuru: Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs. FPL 2004: 801-810
4		Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker: An FPGA Run-Time System for Dynamical On-Demand Reconfiguration. IPDPS 2004
3		Michael Hübner, Tobias Becker, Jürgen Becker: Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration. SBCCI 2004: 28-32
	2003
2		Jürgen Becker, Michael Hübner, Michael Ullmann: Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations. SBCCI 2003: 283-288
1		Jürgen Becker, Michael Hübner, Michael Ullmann: Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations. VLSI-SOC 2003: 129-

Coauthor Index

1	Carsten Albrecht	[26]
2	Josef Angermeier	[41]
3	Günther Auer	[30]
4	Stefan Bach	[28]
5	Salih Bayar	[23]
6	Jürgen Becker	[1] [2] [3] [4] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [48]
7	Tobias Becker	[3]
8	Brandon Blodget	[5]
9	Christophe Bobda	[5]
10	Philippe Bonnot	[44]
11	Lars Braun	[7] [24] [28] [36] [38] [39] [41] [45] [48]
12	Alisson Vasconcelos De Brito	[25]
13	Fabio Campi	[31] [44]
14	Christopher Claus	[24] [39] [41]
15	Marcello Coppola	[31]
16	Massimo Coppola	[44]
17	Tommaso DeMarco	[31] [44]
18	Antonio Deledda	[31] [44]
19	Adam Donlin	[22]
20	Michael Dreschmann	[30]
21	Robert Esser	[32] [42]
22	Juan Fernando Eusse	[47]
23	Christian Gamrat	[29]
24	Diana Göhringer	[34] [36] [40]
25	Philipp Graf	[27] [41]
26	Arnaud Grasset	[44]
27	Björn Grimm	[4] [6]
28	Andreas Herkersdorf	[41] [42]
29	Ricardo Pezzuol Jacobi	[47]
30	Markus Jung	[18]
31	Krzysztof Kepa	[48]
32	A. Klausmann	[7]
33	Roman Koch	[26]
34	Krzysztof Kosciuszkiewicz	[48]
35	Herrmann Krömer	[38]
36	Matthias Kühnle	[17] [25] [31] [35] [44]
37	Vera Lauer	[42]
38	Riccardo Locatelli	[31] [44]
39	Enno Lübbers	[41]
40	Erik Maehle	[26]
41	Mateusz Majer	[41]
42	Giuseppe Maruccia	[31] [44]
43	Elmar U. K. Melcher	[25]
44	Renate Merker	[41]
45	P. Millet	[44]
46	Fearghal Morgan	[48]
47	Claudio Mucci	[31] [44]
48	Klaus D. Müller-Glaser	[27]
49	Adronis Niyonkuru	[5]
50	Juanjo Noguera	[32]
51	Katarina Paulsson	[10] [11] [13] [15] [18] [20] [21] [23] [29] [30] [32] [33] [37] [38] [43] [46]
52	Thomas Perschke	[28] [40]
53	Jean-Marc Philippe	[29]
54	Lorenzo Pieralisi	[31] [44]
55	Thilo Pionteck	[26]
56	Marco Platzner	[41]
57	Matthias Riebisch	[12]
58	Florian Ries	[31] [44]
59	Markus Rullmann	[41]
60	Oliver Sander	[45]
61	Volker Schatz	[28] [34]
62	Christian Schuck	[17] [19] [35]
63	T. Schwalb	[41]
64	Walter Stechele	[24] [39] [41] [42]
65	Marcus Stitz	[13]
66	Jürgen Teich	[41]
67	Alexander Thomas	[10]
68	Michael Ullmann	[1] [2] [4] [6] [7] [8] [9]
69	Ulrich Viereck	[33]
70	Arseni Vitkovski	[44]
71	Bin Zhang	[39]

Colors in the list of coauthors