 | 2009 |
|---|
| 12 |       | Thomas Zeiser,
Georg Hager,
Gerhard Wellein:
The world's fastest CPU and SMP node: Some performance results from the NEC SX-9.
IPDPS 2009: 1-8 |
| 11 | | Rolf Rabenseifner,
Georg Hager,
Gabriele Jost:
Hybrid MPI/OpenMP Parallel Programming on Clusters of Multi-Core SMP Nodes.
PDP 2009: 427-436 |
| 10 | | Markus Wittmann,
Georg Hager:
A Proof of Concept for Optimizing Task Parallelism by Locality Queues
CoRR abs/0902.1884: (2009) |
| 9 | | Jan Treibig,
Georg Hager:
Introducing a Performance Model for Bandwidth-Limited Loop Kernels
CoRR abs/0905.0792: (2009) |
| 8 | | Gerald Schubert,
Georg Hager,
Holger Fehske:
Performance limitations for sparse matrix-vector multiplications on current multicore environments
CoRR abs/0910.4836: (2009) |
| 7 | | Jan Treibig,
Georg Hager,
Gerhard Wellein:
Multi-core architectures: Complexities of performance prediction and the impact of cache topology
CoRR abs/0910.4865: (2009) |
| 2008 |
|---|
| 6 | | Georg Hager,
Thomas Zeiser,
Gerhard Wellein:
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers.
IPDPS 2008: 1-7 |
| 5 | | Georg Hager,
Thomas Zeiser,
Gerhard Wellein:
Data Access Characteristics and Optimizations for Sun UltraSPARC T2 and T2+ Systems.
Parallel Processing Letters 18(4): 471-490 (2008) |
| 2007 |
|---|
| 4 | | Georg Hager,
Thomas Zeiser,
Gerhard Wellein:
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers
CoRR abs/0712.2302: (2007) |
| 3 | | Georg Hager,
Holger Stengel,
Thomas Zeiser,
Gerhard Wellein:
RZBENCH: Performance evaluation of current HPC architectures using low-level and application benchmarks
CoRR abs/0712.3389: (2007) |
| 2006 |
|---|
| 2 | | Rolf Rabenseifner,
Georg Hager,
Gabriele Jost,
Rainer Keller:
Hybrid MPI and OpenMP Parallel Programming.
PVM/MPI 2006: 11 |
| 2002 |
|---|
| 1 | | Gerhard Wellein,
Georg Hager,
Achim Basermann,
Holger Fehske:
Fast Sparse Matrix-Vector Multiplication for TeraFlop/s Computers.
VECPAR 2002: 287-301 |
