Siva Kumar Sastry Hari

	2009
3		Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve: Accurate microarchitecture-level fault modeling for studying hardware faults. HPCA 2009: 105-116
	2008
2		Siva Kumar Sastry Hari, Vishnu Vardhan Reddy Konda, V. Kamakoti, Vivekananda M. Vedula, K. S. Maneperambil: Automatic Constraint Based Test Generation for Behavioral HDL Models. IEEE Trans. VLSI Syst. 16(4): 408-421 (2008)
	2007
1		K. Najeeb, Vishnu Vardhan Reddy Konda, Siva Kumar Sastry Hari, V. Kamakoti, Vivekananda M. Vedula: Power Virus Generation Using Behavioral Models of Circuits. VTS 2007: 35-42

Coauthor Index

1	Sarita V. Adve	[3]
2	V. Kamakoti	[1] [2]
3	Ulya R. Karpuzcu	[3]
4	Vishnu Vardhan Reddy Konda	[1] [2]
5	Man-Lap Li	[3]
6	K. S. Maneperambil	[2]
7	K. Najeeb	[1]
8	Pradeep Ramachandran	[3]
9	Vivekananda M. Vedula	[1] [2]

Colors in the list of coauthors