| 2007 |
| 12 | | Vu Manh Tuan,
Yohei Hasegawa,
Hideharu Amano:
Performance Analysis of Multi-process Execution Model on Dynamically Reconfigurable Processor.
ERSA 2007: 203-206 |
| 11 | EE | Yohei Hasegawa,
Ichiro Yamaguchi,
Takayuki Hama,
Hideyuki Shimonishi,
Tutomu Murase:
Deployable multipath communication scheme with sufficient performance data distribution method.
Computer Communications 30(17): 3285-3292 (2007) |
| 2006 |
| 10 | EE | Vu Manh Tuan,
Yohei Hasegawa,
Naohiro Katsura,
Hideharu Amano:
Performance/Cost Trade-Off Evaluation for the DCT Implementation on the Dynamically Reconfigurable Processor.
ARC 2006: 115-121 |
| 9 | EE | Hideharu Amano,
Yohei Hasegawa,
Shohei Abe,
K. Ishikawa,
Shunsuke Tsutsumi,
Shunsuke Kurotaki,
T. Nakamura,
T. Nishimura:
A Context Dependent Clock Control Mechanism for Dynamically Reconfigurable Processors.
FPL 2006: 1-6 |
| 8 | EE | Masayasu Suzuki,
Yohei Hasegawa,
Vu Manh Tuan,
Shohei Abe,
Hideharu Amano:
A cost-effective context memory structure for dynamically reconfigurable processors.
IPDPS 2006 |
| 7 | EE | Yohei Hasegawa,
Shohei Abe,
Shunsuke Kurotaki,
Vu Manh Tuan,
Naohiro Katsura,
T. Nakamura,
T. Nishimura,
Hideharu Amano:
Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor.
IPDPS 2006 |
| 2005 |
| 6 | EE | Hideharu Amano,
Shohei Abe,
Yohei Hasegawa,
Katsuaki Deguchi,
Masayasu Suzuki:
Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor.
FCCM 2005: 315-316 |
| 5 | EE | Yohei Hasegawa,
Shohei Abe,
Katsuaki Deguchi,
Masayasu Suzuki,
Hideharu Amano:
Time-multiplexed execution on the dynamically reconfigurable processor: a performance/cost evaluation.
FPGA 2005: 265 |
| 4 | | Hideharu Amano,
Shohei Abe,
Katsuaki Deguchi,
Yohei Hasegawa:
An I/O mechanism on a Dynamically Reconfigurable Processor - Which should be moved: Data or Configuration?
FPL 2005: 347-352 |
| 3 | | Yohei Hasegawa,
Shohei Abe,
Hiroki Matsutani,
Hideharu Amano,
Kenichiro Anjo,
Toru Awashima:
An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor.
FPT 2005: 163-170 |
| 2004 |
| 2 | EE | Noriaki Suzuki,
Shunsuke Kurotaki,
Masayasu Suzuki,
Naoto Kaneko,
Yutaka Yamada,
Katsuaki Deguchi,
Yohei Hasegawa,
Hideharu Amano,
Kenichiro Anjo,
Masato Motomura,
Kazutoshi Wakabayashi,
Takeo Toi,
Toru Awashima:
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.
FCCM 2004: 328-329 |
| 2001 |
| 1 | EE | Takashi Egawa,
Koji Hino,
Yohei Hasegawa:
Fast and Secure Packet Processing Environment for Per-Packet QoS Customization.
IWAN 2001: 34-48 |