| 2007 | ||
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| 3 | Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno: Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation. IEICE Transactions 90-C(4): 848-855 (2007) | |
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| 2 | Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi: A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs. ASP-DAC 1998: 51-56 | |
| 1990 | ||
| 1 | Masahiro Tomita, Hong-Hai Jiang, Tamotsu Yamamoto, Yoshihiro Hayashi: An Algorithm for Locating Logic Design Errors. ICCAD 1990: 468-471 | |