| 1997 | ||
|---|---|---|
| 3 | Kazumi Hatayama, Kazunori Hikone, T. Miyazaki, H. Yamada: A practical approach to instruction-based test generation for functional modules of VLSI processors. VTS 1997: 17-23 | |
| 1992 | ||
| 2 | Kazumi Hatayama, Kazunori Hikone, Mitsuji Ikeda, Terumine Hayashi: Sequential Test Generation Based on Real-Value Logic. ITC 1992: 41-48 | |
| 1988 | ||
| 1 | Hideo Fujiwara, Osamu Fujisawa, Kazunori Hikone: Enhancing Random-Pattern Coverage of Programmable Logic Arrays via Masking Technique. ITC 1988: 642-648 | |
| 1 | Osamu Fujisawa | [1] |
| 2 | Hideo Fujiwara | [1] |
| 3 | Kazumi Hatayama | [2] [3] |
| 4 | Terumine Hayashi | [2] |
| 5 | Mitsuji Ikeda | [2] |
| 6 | T. Miyazaki | [3] |
| 7 | H. Yamada | [3] |