 | 2009 |
|---|
| 8 |       | Darshan Desai,
Gerolf Hoflehner,
Arun Kejariwal,
Daniel M. Lavery,
Alexandru Nicolau,
Alexander V. Veidenbaum,
Cameron McNairy:
Performance Characterization of Itanium® 2-Based Montecito Processor.
SPEC Benchmark Workshop 2009: 36-56 |
| 2007 |
|---|
| 7 | | Arun Kejariwal,
Gerolf Hoflehner,
Darshan Desai,
Daniel M. Lavery,
Alexandru Nicolau,
Alexander V. Veidenbaum:
Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture.
SIGMETRICS 2007: 361-362 |
| 2004 |
|---|
| 6 | | Gerolf Hoflehner,
Knud Kirkegaard,
Rod Skinner,
Daniel M. Lavery,
Yong-Fong Lee,
Wei Li:
Compiler Optimizations for Transaction Processing Workloads on Itanium® Linux Systems.
MICRO 2004: 294-303 |
| 2003 |
|---|
| 5 | | Alex Settle,
Daniel A. Connors,
Gerolf Hoflehner,
Daniel M. Lavery:
Optimization for the Intel® Itanium ®Architectur Register Stack.
CGO 2003: 115-124 |
| 4 | | Gerolf Hoflehner,
Daniel M. Lavery,
David C. Sehr:
The compiler as a validation and evaluation tool.
Electr. Notes Theor. Comput. Sci. 82(2): (2003) |
| 2002 |
|---|
| 3 | | R. David Weldon,
Steven S. Chang,
Hong Wang,
Gerolf Hoflehner,
Perry H. Wang,
Daniel M. Lavery,
John Paul Shen:
Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors.
Interaction between Compilers and Computer Architectures 2002: 57-67 |
| 2 | | Shih-Wei Liao,
Perry H. Wang,
Hong Wang,
John Paul Shen,
Gerolf Hoflehner,
Daniel M. Lavery:
Post-Pass Binary Adaptation for Software-Based Speculative Precomputation.
PLDI 2002: 117-128 |
| 2000 |
|---|
| 1 | | Jay Bharadwaj,
William Y. Chen,
Weihaw Chuang,
Gerolf Hoflehner,
Kishore N. Menezes,
Kalyan Muthukumar,
Jim Pierce:
The Intel IA-64 Compiler Code Generator.
IEEE Micro 20(5): 44-53 (2000) |
