 | 2004 |
|---|
| 6 |       | Edson L. Horta,
John W. Lockwood:
Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs.
FPL 2004: 975-979 |
| 2002 |
|---|
| 5 | | Edson L. Horta,
John W. Lockwood,
David E. Taylor,
David Parlour:
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration.
DAC 2002: 343-348 |
| 4 | | Edson L. Horta,
John W. Lockwood,
Sergio Takeo Kofuji:
Using PARBIT to Implement Partial Run-Time Reconfigurable Systems.
FPL 2002: 182-191 |
| 3 | | Edson L. Horta,
Sergio Takeo Kofuji:
A Run-Time Reconfigurable ATM Switch.
IPDPS 2002 |
| 2 | | David E. Taylor,
Jonathan S. Turner,
John W. Lockwood,
Edson L. Horta:
Dynamic hardware plugins: exploiting reconfigurable hardware for high-performance programmable routers.
Computer Networks 38(3): 295-310 (2002) |
| 2000 |
|---|
| 1 |  | Edson L. Horta,
Sergio Takeo Kofuji:
Using reconfigurable logic to implement an active network.
Computers and Their Applications 2000: 37-41 |
