Harry Hsieh

	2009
27		Eric Cheung, Harry Hsieh, Felice Balarin: Partial order method for timed simulation of system-level MPSoC designs. ASP-DAC 2009: 149-154
26		Eric Cheung, Harry Hsieh, Felice Balarin: Fast and accurate performance simulation of embedded software for MPSoC. ASP-DAC 2009: 552-557
25		Eric Cheung, Harry Hsieh, Felice Balarin: Memory subsystem simulation in software TLM/T models. ASP-DAC 2009: 811-816
	2008
24		Eric Cheung, Harry Hsieh, Felice Balarin: Software optimization for MPSoC: a mpeg-2 decoder case study. CODES+ISSS 2008: 43-48
	2007
23		Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin: Assertion-Based Design Exploration of DVS in Network Processor Architectures CoRR abs/0710.4714: (2007)
22		Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid: System Synthesis for Networks of Programmable Blocks CoRR abs/0710.4798: (2007)
	2006
21		Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli: Communication and co-simulation infrastructure for heterogeneous system integration. DATE 2006: 462-467
20		Xi Chen, Harry Hsieh, Felice Balarin: Verification Approach of Metropolis Design Framework for Embedded Systems. International Journal of Parallel Programming 34(1): 3-27 (2006)
	2005
19		Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe: Simulation based deadlock analysis for system level designs. DAC 2005: 260-265
18		Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid: System Synthesis for Networks of Programmable Blocks. DATE 2005: 888-893
17		Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin: Assertion-Based Design Exploration of DVS in Network Processor Architectures. DATE 2005: 92-97
16		Susan Cotterell, Ryan Mannion, Frank Vahid, Harry Hsieh: eBlocks - an enabling technology for basic sensor based systems. IPSN 2005: 422-427
	2004
15		Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Felice Balarin: Utilizing Formal Assertions for System Design of Network Processors. DATE 2004: 126-133
14		Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe: Logic of constraints: a quantitative performance and functional constraint formalism. IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1243-1255 (2004)
	2003
13		Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe: Case Studies of Model Checking for Embedded System Designs. ACSD 2003: 20-28
12		Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh: First results with eBlocks: embedded systems building blocks. CODES+ISSS 2003: 168-175
11		Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe: Automatic trace analysis for logic of constraints. DAC 2003: 460-465
10		Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe: Automatic Generation of Simulation Monitors from Quantitative Constraint Formula. DATE 2003: 11174-11175
9		Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli: Metropolis: An Integrated Electronic System Design Environment. IEEE Computer 36(4): 45-52 (2003)
	2001
8		Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: Synchronous approach to the functional equivalence of embeddedsystem implementations. IEEE Trans. on CAD of Integrated Circuits and Systems 20(8): 1016-1033 (2001)
	2000
7		Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: Efficient methods for embedded system design space exploration. DAC 2000: 607-612
	1999
6		Harry Hsieh, Felice Balarin: Synchronous equivalence for embedded systems: a tool for design exploration. ICCAD 1999: 505-510
5		Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki: Synthesis of software programs for embedded control applications. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 834-849 (1999)
	1997
4		Harry Hsieh, Alberto L. Sangiovanni-Vincentelli: Modeling micro-controller peripherals for high-level co-simulation and synthesis. CODES 1997: 127-134
	1996
3		Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: Formal Verification of Embedded Systems based on CFSM Networks. DAC 1996: 568-571
	1995
2		Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich: Synthesis of Software Programs for Embedded Control Applications. DAC 1995: 587-592
	1994
1		Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki: A case study in computer-aided codesign of embedded controllers. CODES 1994: 220-224

Coauthor Index

1	Felice Balarin	[3] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [17] [20] [21] [23] [24] [25] [26] [27]
2	Laxmi N. Bhuyan	[15]
3	Xi Chen	[10] [11] [13] [14] [15] [17] [19] [20] [21] [23]
4	Eric Cheung	[24] [25] [26] [27]
5	Massimiliano Chiodo	[1] [2] [5]
6	Susan Cotterell	[12] [16] [18] [22]
7	Abhijit Davare	[19]
8	Paolo Giusto	[1] [2] [5]
9	Attila Jurecska	[1] [2] [3] [5]
10	Luciano Lavagno	[1] [2] [3] [5] [7] [8] [9]
11	Yan Luo	[15]
12	Ryan Mannion	[16] [18] [22]
13	Walid A. Najjar	[12]
14	Claudio Passerone	[9]
15	Alberto L. Sangiovanni-Vincentelli	[1] [2] [3] [4] [5] [7] [8] [9] [19] [21]
16	Ellen Sentovich (Ellen M. Sentovich)	[2] [5]
17	Kei Suzuki	[1] [2] [5]
18	Frank Vahid	[12] [16] [18] [22]
19	Yosinori Watanabe	[9] [10] [11] [13] [14] [19]
20	Wei Wu	[17] [23]
21	Jun Yang	[17] [23]
22	Guang Yang	[21]
23	S. Yee	[1]
24	Jia Yu	[17] [23]