Chin-Hsiung Hsu Coauthor index DBLP Vis pubzone.org

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DBLP keys2009
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHuang-Yu Chen, Chin-Hsiung Hsu, Yao-Wen Chang: High-performance global routing with fast overflow reduction. ASP-DAC 2009: 582-587
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJia-Wei Fang, Chin-Hsiung Hsu, Yao-Wen Chang: An Integer-Linear-Programming-Based Routing Algorithm for Flip-Chip Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 98-110 (2009)
2008
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChin-Hsiung Hsu, Huang-Yu Chen, Yao-Wen Chang: Multi-layer global routing considering via and wire capacities. ICCAD 2008: 350-355
2007
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJia-Wei Fang, Chin-Hsiung Hsu, Yao-Wen Chang: An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design. DAC 2007: 606-611
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChin-Hsiung Hsu, Szu-Jui Chou, Jie-Hong Roland Jiang, Yao-Wen Chang: A Statistical Approach to the Timing-Yield Optimization of Pipeline Circuits. PATMOS 2007: 148-159

Coauthor Index

1Yao-Wen Chang [1] [2] [3] [4] [5]
2Huang-Yu Chen [3] [5]
3Szu-Jui Chou [1]
4Jia-Wei Fang [2] [4]
5Jie-Hong Roland Jiang [1]

Copyright © Fri Dec 18 14:20:30 2009 by Michael Ley (ley@uni-trier.de)