| 2009 | ||
|---|---|---|
| 39 | Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu, Antonia Zhai, Nikhil Mungre, Ankit Tarkas: Dynamic performance tuning for speculative threads. ISCA 2009: 462-473 | |
| 38 | Venkatesan Packirisamy, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew, Tin-Fook Ngai: Exploring speculative parallelism in SPEC2006. ISPASS 2009: 77-88 | |
| 2007 | ||
| 37 | Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva: Entropy-Based Profile Characterization and Classification for Automatic Profile Management. Asia-Pacific Computer Systems Architecture Conference 2007: 40-51 | |
| 36 | Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew: COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications. ICPP 2007: 25 | |
| 35 | Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Douglas M. Hawkins, Wei-Chung Hsu, Pen-Chung Yew: CIM: A Reliable Metric for Evaluating Program Phase Classifications. Computer Architecture Letters 6(1): 9-12 (2007) | |
| 2006 | ||
| 34 | Abhinav Das, Rao Fu, Antonia Zhai, Wei-Chung Hsu: Issues and Support for Dynamic Register Allocation. Asia-Pacific Computer Systems Architecture Conference 2006: 351-358 | |
| 33 | Rao Fu, Jiwei Lu, Antonia Zhai, Wei-Chung Hsu: A Study of the Performance Potential for Dynamic Instruction Hints Selection. Asia-Pacific Computer Systems Architecture Conference 2006: 67-80 | |
| 32 | Abhinav Das, Jiwei Lu, Wei-Chung Hsu: Region Monitoring for Local Phase Detection in Dynamic Optimization Systems. CGO 2006: 124-134 | |
| 31 | Venkatesan Packirisamy, Shengyue Wang, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew: Supporting Speculative Multithreading on Simultaneous Multithreaded Processors. HiPC 2006: 148-158 | |
| 30 | Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai: Recovery code generation for general speculative optimizations. TACO 3(1): 67-89 (2006) | |
| 2005 | ||
| 29 | Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew: A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion. CGO 2005: 280-290 | |
| 28 | Abhinav Das, Jiwei Lu, Howard Chen, Jinpyo Kim, Pen-Chung Yew, Wei-Chung Hsu, Dong-yuan Chen: Performance of Runtime Optimization on BLAST. CGO 2005: 86-96 | |
| 27 | Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew: Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. HiPEAC 2005: 203-217 | |
| 26 | Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen, Santosh G. Abraham: Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor. MICRO 2005: 93-104 | |
| 2004 | ||
| 25 | Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew: Continuous Adaptive Object-Code Re-optimization Framework. Asia-Pacific Computer Systems Architecture Conference 2004: 241-255 | |
| 24 | Tong Chen, Jin Lin, Xiaoru Dai, Wei-Chung Hsu, Pen-Chung Yew: Data Dependence Profiling for Speculative Optimizations. CC 2004: 57-72 | |
| 23 | Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai: A Compiler Framework for Recovery Code Generation in General Speculative Optimizations. IEEE PACT 2004: 17-28 | |
| 22 | Jiwei Lu, Howard Chen, Pen-Chung Yew, Wei-Chung Hsu: Design and Implementation of a Lightweight Dynamic Optimization System. J. Instruction-Level Parallelism 6: (2004) | |
| 21 | Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan: A compiler framework for speculative optimizations. TACO 1(3): 247-271 (2004) | |
| 2003 | ||
| 20 | Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew: Speculative Register Promotion Using Advanced Load Address Table (ALAT). CGO 2003: 125-134 | |
| 19 | Howard Chen, Wei-Chung Hsu, Dong-yuan Chen: Dynamic Trace Selection Using Performance Monitoring Hardware Sampling. CGO 2003: 79-90 | |
| 18 | Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobbie Othmer, Pen-Chung Yew, Dong-yuan Chen: The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System. MICRO 2003: 180-190 | |
| 17 | Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan: A compiler framework for speculative analysis and optimizations. PLDI 2003: 289-299 | |
| 2002 | ||
| 16 | Tong Chen, Jin Lin, Wei-Chung Hsu, Pen-Chung Yew: On the Impact of Naming Methods for Heap-Oriented Pointers in C Programs. ISPAN 2002: 251- | |
| 15 | Wei-Chung Hsu, Howard Chen, Pen-Chung Yew, Dong-yuan Chen: On the Predictability of Program Behavior Using Different Input Data Sets. Interaction between Compilers and Computer Architectures 2002: 45- | |
| 14 | Tong Chen, Jin Lin, Wei-Chung Hsu, Pen-Chung Yew: An Empirical Study on the Granularity of Pointer Analysis in C Programs. LCPC 2002: 157-171 | |
| 1998 | ||
| 13 | Wei-Chung Hsu, James E. Smith: A Performance Study of Instruction Cache Prefetching Methods. IEEE Trans. Computers 47(5): 497-508 (1998) | |
| 1997 | ||
| 12 | Vatsa Santhanam, Edward H. Gornish, Wei-Chung Hsu: Data Prefetching on the HP PA-8000. ISCA 1997: 264-273 | |
| 1996 | ||
| 11 | David A. Dunn, Wei-Chung Hsu: Instruction Scheduling for the HP PA-8000. MICRO 1996: 298-307 | |
| 1993 | ||
| 10 | Wei-Chung Hsu, James E. Smith: Performance of Cached DRAM Organizations in Vector Supercomputers. ISCA 1993: 327-336 | |
| 9 | Sriram Vajapeyam, Wei-Chung Hsu: Toward Effective Scalar Hardware for Highly Vectorizable Applications. J. Parallel Distrib. Comput. 19(3): 147-162 (1993) | |
| 1992 | ||
| 8 | Sriram Vajapeyam, Wei-Chung Hsu: On the instruction-level characteristics of scalar code in highly-vectorized scientific applications. MICRO 1992: 20-28 | |
| 7 | James E. Smith, Wei-Chung Hsu: Prefetching in Supercomputer Instruction Caches. SC 1992: 588-597 | |
| 1991 | ||
| 6 | Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu: An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks. ISCA 1991: 170-179 | |
| 1990 | ||
| 5 | James E. Smith, Wei-Chung Hsu, Christopher C. Hsiung: Future general purpose supercomputer architectures. SC 1990: 796-804 | |
| 1989 | ||
| 4 | Wei-Chung Hsu, Charles N. Fischer, James R. Goodman: On the Minimization of Loads/Stores in Local Register Allocation. IEEE Trans. Software Eng. 15(10): 1252-1260 (1989) | |
| 1988 | ||
| 3 | James R. Goodman, Wei-Chung Hsu: Code scheduling and register allocation in large basic blocks. ICS 1988: 442-452 | |
| 1987 | ||
| 2 | Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter: WISQ: A Restartable Architecture Using Queues. ISCA 1987: 290-299 | |
| 1986 | ||
| 1 | James R. Goodman, Wei-Chung Hsu: On the Use of Registers vs. Cache to Minimize Memory Traffic. ISCA 1986: 375-383 | |