 | 2006 |
|---|
| 9 |       | Renqiu Huang,
Ranga Vemuri:
Transformation synthesis for data intensive applications to FPGAs.
ACM Great Lakes Symposium on VLSI 2006: 349-352 |
| 2005 |
|---|
| 8 |  | Renqiu Huang,
Ranga Vemuri:
PAHLS: Towards Run-Time Synthesis for FPGAs.
FPL 2005: 739-740 |
| 7 | | Renqiu Huang,
Ranga Vemuri:
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs.
ISVLSI 2005: 250-251 |
| 6 | | Renqiu Huang,
Ranga Vemuri:
On-Line Synthesis for Partially Reconfigurable FPGAs.
VLSI Design 2005: 663-668 |
| 2004 |
|---|
| 5 | | Jawad Khan,
Jayanthi Rajagopalan,
Renqiu Huang,
Ranga Vemuri:
A Portable Face Recognition System Using Reconfigurable Hardware.
ERSA 2004: 213-217 |
| 4 | | Renqiu Huang,
Manish Handa,
Ranga Vemuri:
Analysis of a Hybrid Interconnect Architecture for Dynamically Reconfigurable FPGAs.
FPL 2004: 900-905 |
| 3 | | Renqiu Huang,
Ranga Vemuri:
Analysis and evaluation of a hybrid interconnect structure for FPGAs.
ICCAD 2004: 595-601 |
| 2 | | Renqiu Huang,
Ranga Vemuri:
Forward-Looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs.
IPDPS 2004 |
| 2003 |
|---|
| 1 | | Renqiu Huang,
Tommy Cheung,
Ted Kok:
A Statistical Analysis Tool for FPLD Architectures.
FPL 2003: 1000-1003 |
