José L. Huertas
List of publications from the DBLP Bibliography Server - FAQ
| 2008 | ||
|---|---|---|
| 59 | Gloria Huertas, José Luis Huertas: Oscillation-Based Test in Data Converters: On-Line Monitoring. DELTA 2008: 322-325 | |
| 58 | Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas: A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. SBCCI 2008: 70-75 | |
| 2007 | ||
| 57 | John M. Espinosa-Duran, Jaime Velasco-Medina, Gloria Huertas, José Luis Huertas: Total ionizing dose effects in switched-capacitor filters using oscillation-based test. SBCCI 2007: 263-266 | |
| 2005 | ||
| 56 | Maria J. Avedillo, José M. Quintana, José L. Huertas: Robust frequency divider based on resonant tunneling devices. ISCAS (3) 2005: 2647-2650 | |
| 55 | Adoración Rueda, Michel Renovell, José Luis Huertas: Guest Editorial. J. Electronic Testing 21(3): 203 (2005) | |
| 54 | Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Leger, Adoración Rueda, José Luis Huertas: Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. J. Electronic Testing 21(3): 221-232 (2005) | |
| 2004 | ||
| 53 | Diego Vázquez, Gildas Leger, Gloria Huertas, Adoración Rueda, José L. Huertas: A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. DATE 2004: 298-305 | |
| 52 | Marcelo Lubaszewski, José Luis Huertas: Test and Design-for-Test of Mixed-Signal Integrated Circuits. IFIP Congress Tutorials 2004: 183-212 | |
| 51 | José Luis Huertas: Test and design-for-test of mixed-signal integrated circuits. SBCCI 2004: 4 | |
| 2003 | ||
| 50 | Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas: Oscillation-based test in bandpass oversampled A/D converters. Microelectronics Journal 34(10): 927-936 (2003) | |
| 2002 | ||
| 49 | Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas: Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. DELTA 2002: 18-24 | |
| 48 | Diego Vázquez, Gloria Huertas, Gildas Leger, Adoración Rueda, José L. Huertas: Practical solutions for the application of the oscillation-based-test in analog integrated circuits. ISCAS (1) 2002: 589-592 | |
| 47 | José M. Quintana, Maria J. Avedillo, José L. Huertas: Simplified Reed-Muller expressions for residue threshold functions. ISCAS (4) 2002: 599-602 | |
| 46 | Diego Vázquez, Gloria Huertas, Gildas Leger, Adoración Rueda, José L. Huertas: Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. VTS 2002: 433-438 | |
| 45 | Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas: Practical Oscillation-Based Test of Integrated Filters. IEEE Design & Test of Computers 19(6): 64-72 (2002) | |
| 44 | Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas: Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. IEEE Design & Test of Computers 19(6): 73-82 (2002) | |
| 2001 | ||
| 43 | Eduardo J. Peralías, Adoración Rueda, José L. Huertas: Structural testing of pipelined analog to digital converters. ISCAS (1) 2001: 436-439 | |
| 42 | Eduardo J. Peralías, Gloria Huertas, Adoración Rueda, José L. Huertas: Self-Testable Pipelined ADC with Low Hardware Overhead. VTS 2001: 272-278 | |
| 41 | José M. Quintana, Maria J. Avedillo, José Luis Huertas: Efficient Realization of a Threshold Voter for Self-Purging Redundancy. J. Electronic Testing 17(1): 69-73 (2001) | |
| 40 | Eduardo J. Peralías, Adoración Rueda, José Luis Huertas: New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. J. Electronic Testing 17(5): 373-383 (2001) | |
| 2000 | ||
| 39 | Chin-Long Wey, Adam Osseiran, José Luis Huertas, Yeon-Chen Nieu: Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way. Asian Test Symposium 2000: 15- | |
| 38 | Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas: Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. Asian Test Symposium 2000: 31-38 | |
| 37 | Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas: A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. DATE 2000: 534-538 | |
| 36 | Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas: Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. VLSI Design 2000: 568-571 | |
| 1999 | ||
| 35 | Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas: An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length. DATE 1999: 521-525 | |
| 34 | Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas: Effective oscillation-based test for application to a DTMF filter bank. ITC 1999: 549-555 | |
| 33 | T. A. García, Antonio J. Acosta, J. M. Mora, J. Ramos, José Luis Huertas: Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. J. Electronic Testing 15(1-2): 115-127 (1999) | |
| 1998 | ||
| 32 | Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas: Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. DATE 1998: 810-814 | |
| 31 | Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas: A Dynamic Model for the State Assignment Problem. DATE 1998: 835-839 | |
| 30 | Juan A. Prieto, Adoración Rueda, Ian A. Grout, Eduardo J. Peralías, José L. Huertas, Andrew M. D. Richardson: An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. DATE 1998: 905- | |
| 29 | Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas: DfT and on-line test of high-performance data converters: a practical case. ITC 1998: 534- | |
| 28 | T. A. García, Antonio J. Acosta, José L. Huertas, J. M. Mora, J. Ramos: Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. VTS 1998: 92-97 | |
| 1997 | ||
| 27 | Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas: SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. DAC 1997: 281-286 | |
| 26 | Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas: A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. ED&TC 1997: 389-394 | |
| 25 | Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, B. Kim, Adoración Rueda, Mani Soma, Prashant Goteti: Analog and Mixed-Signal Benchmark Circuits-First Release. ITC 1997: 183-190 | |
| 24 | Eduardo J. Peralías, Adoración Rueda, José L. Huertas: A DFT Technique for Analog-to-Digital Converters with digital correction. VTS 1997: 302-307 | |
| 1996 | ||
| 23 | Diego Vázquez, José L. Huertas, Adoración Rueda: Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. VTS 1996: 42-47 | |
| 1995 | ||
| 22 | José M. Quintana, Maria J. Avedillo, Maria P. Parra, José L. Huertas: Optimum PLA folding through boolean satisfiability. ASP-DAC 1995 | |
| 21 | Antonio J. Acosta, Manuel J. Bellido, Manuel Valencia, Angel Barriga Barrios, Raúl Jiménez, José L. Huertas: New CMOS VLSI linear self-timed architectures. ASYNC 1995: 14-23 | |
| 20 | Eduardo J. Peralías, Adoración Rueda, José Luis Huertas: Statistical behavioral modeling and characterization of A/D converters. ICCAD 1995: 562-566 | |
| 19 | R. Rodriguez-Macias, Francisco V. Fernández, Ángel Rodríguez-Vázquez, José L. Huertas: A Tool for Fast Mismatch Analysis of Analog Circuits. ISCAS 1995: 2148-2151 | |
| 18 | Diego Vázquez, Adoración Rueda, José L. Huertas: A solution for the on-line test of analog ladder filters. VTS 1995: 48-53 | |
| 17 | Manuel Valencia, Manuel J. Bellido, José L. Huertas, Antonio J. Acosta, Santiago Sánchez-Solano: Modular Asynchronous Arbiter Insensitive to Metastability. IEEE Trans. Computers 44(12): 1456-1461 (1995) | |
| 16 | Maria J. Avedillo, José M. Quintana, José Luis Huertas: Constrained state assignment of easily testable FSMs. J. Electronic Testing 6(1): 133-138 (1995) | |
| 1994 | ||
| 15 | Diego Vázquez, Adoración Rueda, José L. Huertas: A Low-Cost Strategy for Testing Analog Filters. ISCAS 1994: 123-126 | |
| 14 | Alberto Yufera, Adoración Rueda, José L. Huertas: A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. ISCAS 1994: 317-320 | |
| 13 | F. Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez, José L. Huertas: Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design. ISCAS 1994: 445-448 | |
| 12 | Juan A. Prieto, José M. Quintana, Adoración Rueda, José L. Huertas: An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. ISCAS 1994: 491-494 | |
| 11 | Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, José Luis Huertas: A Real Time Clustering CMOS Neural Engine. NIPS 1994: 755-762 | |
| 1993 | ||
| 10 | F. Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez, José L. Huertas: A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization. ISCAS 1993: 1373-1376 | |
| 9 | Maria J. Avedillo, José M. Quintana, José L. Huertas: Easily Testable PLA-based FSMS. ISCAS 1993: 1603-1606 | |
| 8 | Manuel J. Bellido, Manuel Valencia, Antonio J. Acosta, Angel Barriga Barrios, José Luis Huertas, Rafael Domínguez-Castro: A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. ISCAS 1993: 2019-2022 | |
| 7 | Servando Espejo-Meana, Ángel Rodríguez-Vázquez, Rafael Domínguez-Castro, Bernabé Linares-Barranco, José Luis Huertas: A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques. ISCAS 1993: 970-973 | |
| 6 | José Luis Huertas, Adoración Rueda, Diego Vázquez: Improving the testability of switched-capacitor filters. J. Electronic Testing 4(4): 299-313 (1993) | |
| 1992 | ||
| 5 | Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. D. Martín, José L. Huertas: Accuate simplification of large symbolic formulae. ICCAD 1992: 318-321 | |
| 1991 | ||
| 4 | Bernabé Linares-Barranco, S. Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José Luis Huertas: CMOS Continuous BAM With On Chip Learning. IWANN 1991: 322-327 | |
| 1990 | ||
| 3 | Maria J. Avedillo, José M. Quintana, José Luis Huertas: A new method for the state reduction of incompletely specified finite sequential machines. EURO-DAC 1990: 552-556 | |
| 1976 | ||
| 2 | José L. Huertas, J. I. Acha: Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function. IEEE Trans. Computers 25(3): 297-300 (1976) | |
| 1 | J. I. Acha, José L. Huertas: On Input and Next-State Equations of the R-S Type M-Stable. IEEE Trans. Computers 25(7): 759-763 (1976) | |