Michael Hutton

Michael D. Hutton, Mike Hutton

	2008
36		Mike Hutton, Paul Chow: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008 ACM 2008
35		Yan Lin, Lei He, Mike Hutton: Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. VLSI Syst. 16(2): 124-133 (2008)
34		André DeHon, Mike Hutton: Guest Editorial: TRETS Special Edition on the 15th International Symposium on FPGAs. TRETS 1(1): (2008)
	2007
33		André DeHon, Mike Hutton: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007 ACM 2007
32		Paul Chow, Mike Hutton: Integrating FPGAs in high-performance computing: introduction. FPGA 2007: 131
31		Joachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam: Equivalence Verification of FPGA and Structured ASIC Implementations. FPL 2007: 423-428
30		Dwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic: An FPGA Based Memory Efficient Shared Buffer Implementation. FPL 2007: 661-664
29		Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig: Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD 2007: 370-375
28		Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Michael Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris, Chung-Kuan Cheng: Efficient Timing Analysis With Known False Paths Using Biclique Covering. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 959-969 (2007)
	2006
27		Mike Hutton, Joni Dambre: The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings ACM 2006
26		Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael Hutton: Efficient static timing analysis using a unified framework for false paths and multi-cycle paths. ASP-DAC 2006: 73-78
25		Michael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo: A methodology for FPGA to structured-ASIC synthesis and verification. DATE Designers' Forum 2006: 64-69
24		Mike Hutton: FPGA Architecture Design Methodology. FPL 2006: 1
23		Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton: FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL 2006: 1-6
22		Mike Hutton, Yan Lin, Lei He: Placement and Timing for FPGAs Considering Variations. FPL 2006: 1-7
21		Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng: Timing model reduction for hierarchical timing analysis. ICCAD 2006: 415-422
	2005
20		Igor L. Markov, Mike Hutton: The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings ACM 2005
19		David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose: The Stratix II logic and routing architecture. FPGA 2005: 14-20
18		Mike Hutton, David Karchmer, Bryan Archell, Jason Govig: Efficient static timing analysis and applications using edge masks. FPGA 2005: 174-183
17		Boris Ratchev, Mike Hutton, David Mendel: Coping With Uncertainty in FPGA Architecture Design. FPL 2005: 662-665
16		Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris: Improving the efficiency of static timing analysis with false paths. ICCAD 2005: 527-531
15		Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton: Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED 2005: 90
	2004
14		Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini: Improving FPGA Performance and Area Using an Adaptive Logic Module. FPL 2004: 135-144
13		Mike Hutton: Architecture and CAD for FPGAs. SBCCI 2004: 3
12		Mike Hutton: Advances and trends in FPGA design. SBCCI 2004: 8
	2003
11		Joachim Pistorius, Mike Hutton: Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation. SLIP 2003: 31-38
	2002
10		Michael Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh Patel, Bruce Pedersen, Jay Schleicher, Sergey Shumarayev: Interconnect enhancements for a high-speed PLD architecture. FPGA 2002: 3-10
9		Michael D. Hutton, Jonathan Rose, Derek G. Corneil: Automatic generation of synthetic sequential benchmark circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(8): 928-940 (2002)
	2001
8		Michael D. Hutton: Interconnect prediction for programmable logic devices. SLIP 2001: 125-131
	1999
7		Michael D. Hutton, Jonathan Rose: Equivalence classes of clone circuits for physical-design benchmarking. ISCAS (6) 1999: 428-431
6		Michael D. Hutton, Jonathan Rose: Applications of clone circuits to issues in physical-design. ISCAS (6) 1999: 448-451
	1998
5		Michael D. Hutton, Jonathan Rose, Jerry P. Grossman, Derek G. Corneil: Characterization and parameterized generation of synthetic combinational benchmark circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(10): 985-996 (1998)
	1997
4		Michael D. Hutton, Jonathan Rose, Derek G. Corneil: Generation of Synthetic Sequential Benchmark Circuits. FPGA 1997: 149-155
	1996
3		Michael D. Hutton, Jerry P. Grossman, Jonathan Rose, Derek G. Corneil: Characterization and Parameterized Random Generation of Digital Circuits. DAC 1996: 94-99
2		Michael D. Hutton, Anna Lubiw: Upward Planning of Single-Source Acyclic Digraphs. SIAM J. Comput. 25(2): 291-311 (1996)
	1991
1		Michael D. Hutton, Anna Lubiw: Upward Planar Drawing of Single Source Acyclic Digraphs. SODA 1991: 203-211

Coauthor Index

1	Elias Ahmed	[19]
2	Bryan Archell	[18]
3	Gregg Baeckler	[14] [19] [25]
4	Vaughn Betz	[19]
5	Mark Bourgeault	[14] [19]
6	Dwayne Burns	[30]
7	Kevin Cackovic	[30]
8	David Cashman	[19]
9	Vinson Chan	[10]
10	Deming Chen	[29]
11	Hongyu Chen	[16] [26] [28]
12	Chung-Kuan Cheng	[16] [21] [26] [28]
13	Lei Cheng	[29]
14	Lerong Cheng	[23]
15	Sammy Cheung	[25]
16	Nan-Chi Chou	[16] [28]
17	Paul Chow	[32] [36]
18	Kar Keng Chua	[25]
19	Richard Cliff	[19]
20	Truman Collins	[16] [28]
21	Derek G. Corneil	[3] [4] [5] [9]
22	Joni Dambre (J. Dambre)	[27]
23	André DeHon	[33] [34]
24	David R. Galloway	[19]
25	Jason Govig	[18] [29]
26	Ronald L. Graham	[21]
27	Jerry P. Grossman	[3] [5]
28	Lei He	[15] [22] [23] [35]
29	Yuanfang Hu	[21]
30	Mihail Iotov	[31]
31	Enoch Julias	[31]
32	Sinan Kaptanoglu	[14]
33	David Karchmer	[18]
34	Peter Kazarian	[10]
35	Henry Kim	[14]
36	Christopher Lane	[19]
37	Andy Lee	[14] [19]
38	Paul Leventis	[19]
39	David M. Lewis	[14] [19]
40	Yan Lin	[22] [35]
41	Anna Lubiw	[1] [2]
42	Igor L. Markov	[20]
43	Sandy Marquardt	[19]
44	Victor Maruri	[10]
45	Cameron McClintock	[19]
46	Kieran McLaughlin	[30]
47	David Mendel	[17]
48	Tony Ngai	[10]
49	Ketan Padalia	[14] [19]
50	Jim Park	[10]
51	Rakesh Patel	[10]
52	Bruce Pedersen	[10] [14] [19]
53	Hee Kong Phoo	[25]
54	Joachim Pistorius	[11] [31]
55	Giles Powell	[19]
56	Boris Ratchev	[14] [17] [19]
57	Srinivas Reddy	[19]
58	Jonathan Rose	[3] [4] [5] [6] [7] [9] [19]
59	Rahul Saini	[14]
60	Jay Schleicher	[10] [14] [19] [25] [31]
61	Sakir Sezer	[30]
62	Sergey Shumarayev	[10]
63	Sridhar Srinivasan	[16] [28]
64	Kevin Stevens	[19]
65	Peter Suaris (Peter Ramyalal Suaris)	[16] [28]
66	Kumara Tharmalingam	[31]
67	Ciaran Toal	[30]
68	Tim Tuan	[15]
69	Steven J. E. Wilton	[15]
70	Martin D. F. Wong (D. F. Wong)	[29]
71	Jinjun Xiong	[23]
72	Bo Yao	[16] [26] [28]
73	Richard Yuan	[14] [19] [25]
74	Shuo Zhou	[16] [21] [26] [28]
75	Yi Zhu	[16] [21] [26] [28]

Colors in the list of coauthors