Adrian M. Ionescu

	2008
11		Yogesh Singh Chauhan, D. Tsamados, Nicolas Abelé, C. Eggimann, Michel J. Declercq, Adrian M. Ionescu: Compact Modeling of Suspended Gate FET. VLSI Design 2008: 119-124
10		Nicolas Abelé, D. Grogg, C. Hibert, F. Casset, Pascal Ancey, Adrian M. Ionescu: 0-level Vacuum Packaging RT Process for MEMS Resonators CoRR abs/0802.3093: (2008)
9		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2053-2067 (2008)
	2007
8		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD 2007: 765-772
7		Yogesh Singh Chauhan, Francois Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu: A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. VLSI Design 2007: 177-182
	2005
6		Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267
	2004
5		Anirban Basu, Sheng-Chih Lin, Christoph Wasshuber, Adrian M. Ionescu, Kaustav Banerjee: A Comprehensive Analytical Capacitance Model of a Two Dimensional Nanodot Array. ISQED 2004: 259-264
	2003
4		Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian M. Ionescu: A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits. ICCAD 2003: 497-503
	2002
3		Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier: Few electron devices: towards hybrid CMOS-SET integrated circuits. DAC 2002: 88-93
2		Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq: A SET quantizer circuit aiming at digital communication system. ISCAS (5) 2002: 860-863
1		Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, P. Renaud, C. Hibert, Philippe Flückiger, G. A. Racine: Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture. ISQED 2002: 496-501

Coauthor Index

1	Nicolas Abelé	[10] [11]
2	Pascal Ancey	[10]
3	David Atienza	[8] [9]
4	Benoit Bakeroot	[7]
5	Kaustav Banerjee	[1] [2] [3] [4] [5]
6	Anirban Basu	[5]
7	Didier Bouvet	[8] [9]
8	F. Casset	[10]
9	Yogesh Singh Chauhan	[7] [11]
10	Sorin Cotofana (Sorin Dan Cotofana)	[6]
11	Michel J. Declercq	[1] [2] [3] [7] [11]
12	C. Eggimann	[11]
13	Philippe Flückiger	[1]
14	R. Fritschi	[1]
15	Jacques Gautier	[3]
16	Renaud Gillon	[7]
17	Manfred Glesner	[6]
18	D. Grogg	[10]
19	C. Hibert	[1] [10]
20	M. Haykel Ben Jamaa	[8] [9]
21	Francois Krummenacher	[7]
22	Yusuf Leblebici	[6] [8] [9]
23	Sheng-Chih Lin	[5]
24	Santanu Mahapatra	[2] [3] [4]
25	Giovanni De Micheli	[8] [9]
26	Kirsten E. Moselund	[8] [9]
27	Florent Pegeon	[4]
28	V. Pott	[1]
29	G. A. Racine	[1]
30	P. Renaud	[1]
31	A. Rubio	[6]
32	Alexandre Schmid	[6]
33	Oliver Soffke	[6]
34	D. Tsamados	[11]
35	Christoph Wasshuber	[5]
36	Peter Zipf	[6]

Colors in the list of coauthors