| 2008 | ||
|---|---|---|
| 39 | Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Area efficient delay-insensitive and differential current sensing on-chip interconnect. SoCC 2008: 143-146 | |
| 38 | Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen: Analysis of Delay Variation in Encoded On-Chip Bus Signaling under Process Variation. VLSI Design 2008: 228-234 | |
| 37 | Sampo Tuuna, Li-Rong Zheng, Jouni Isoaho, Hannu Tenhunen: Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid. IEEE Trans. VLSI Syst. 16(6): 766-770 (2008) | |
| 36 | Muhammad Imran Anwar, Seppo Virtanen, Jouni Isoaho: A software defined approach for common baseband processing. Journal of Systems Architecture - Embedded Systems Design 54(8): 769-786 (2008) | |
| 2007 | ||
| 35 | Pekka Rantala, Jouni Isoaho, Hannu Tenhunen: Novel Agent-Based Management for Fault-Tolerance in Network-on-Chip. DSD 2007: 551-555 | |
| 34 | Pekka Rantala, Jouni Isoaho, Hannu Tenhunen: Agent-Based Reconfigurability for Fault-Tolerance in Network-on-Chip. ERSA 2007: 207-210 | |
| 33 | Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding. ISCAS 2007: 649-652 | |
| 2006 | ||
| 32 | Tuomo Saarni, Jyri Paakkulainen, Tuomas Mäkilä, Jussi Hakokari, Olli Aaltonen, Jouni Isoaho, Tapio Salakoski: Implementing a Rule-Based Speech Synthesizer on a Mobile Platform. FinTAL 2006: 349-355 | |
| 31 | Tuomo Saarni, Jussi Hakokari, Jouni Isoaho, Olli Aaltonen, Tapio Salakoski: Segmental Duration in Utterance-Initial Environment: Evidence from Finnish Speech Corpora. FinTAL 2006: 576-584 | |
| 30 | Annu Paganus, Vesa-Petteri Mikkonen, Tomi Mäntylä, Sami Nuuttila, Jouni Isoaho, Olli Aaltonen, Tapio Salakoski: The Vowel Game: Continuous Real-Time Visualization for Pronunciation Learning with Vowel Charts. FinTAL 2006: 696-703 | |
| 29 | Teijo Lehtonen, Pekka Rantala, P. Isomaki, Juha Plosila, Jouni Isoaho: An approach for analysing and improving fault tolerance in radio architectures. ISCAS 2006 | |
| 28 | Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Full-duplex link implementation using dual-rail encoding and multiple-valued current-mode logic. ISCAS 2006 | |
| 27 | Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Delay-Insensitive On-Chip Communication Link using Low-Swing Simultaneous Bidirectional Signaling. ISVLSI 2006: 217-224 | |
| 26 | Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen: Analytical model for crosstalk and intersymbol interference in point-to-point buses. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1400-1410 (2006) | |
| 2005 | ||
| 25 | Seppo Virtanen, Dragos Truscan, Jani Paakkulainen, Jouni Isoaho, Johan Lilius: Highly Automated FPGA Synthesis of Application-Specific Protocol Processors. FPL 2005: 269-274 | |
| 24 | Juha Plosila, Pasi Liljeberg, Jouni Isoaho: Modelling and Refinement of an On-Chip Communication Architecture. ICFEM 2005: 219-234 | |
| 23 | Meigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen: Case study of interconnect analysis for standing wave oscillator design. ISCAS (1) 2005: 456-459 | |
| 22 | Meigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen: Concurrent Chip Package Design for Global Clock Distribution Network Using Standing Wave Approach. ISQED 2005: 573-578 | |
| 21 | Jari Nurmi, Jan Madsen, Erwin Ofner, Jouni Isoaho, Hannu Tenhunen: The SoC-Mobinet Model in System-on-Chip Education. MSE 2005: 71-72 | |
| 20 | Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho: Tuning a Protocol Processor Architecture Towards DSP Operations. SAMOS 2005: 132-141 | |
| 2004 | ||
| 19 | Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Self-timed communication platform for implementing high-performance systems-on-chip. Integration 38(1): 43-67 (2004) | |
| 2003 | ||
| 18 | Maria Alaranta, Tuomas Valtonen, Jouni Isoaho: Software for the Changing E-Business. I3E 2003: 103-115 | |
| 17 | Tapani Ahonen, Tero Nurmi, Jari Nurmi, Jouni Isoaho: Block-wise Extraction of Rent's Exponents for an Extensible Processor. ISVLSI 2003: 193-202 | |
| 16 | Sampo Tuuna, Jouni Isoaho: Estimation of Crosstalk Noise for On-Chip Buses. PATMOS 2003: 111-120 | |
| 15 | Johanna Tuominen, Pasi Liljeberg, Jouni Isoaho: Self-Timed Approach for Reducing On-Chip Switching Noise. VLSI-SOC 2003: 19-24 | |
| 2002 | ||
| 14 | Tuomas Valtonen, Jouni Isoaho, Hannu Tenhunen: The Case for Fine-Grained Re-configurable Architectures: An Analysis of Conceived Performance. FPL 2002: 816-825 | |
| 13 | Tuomas Valtonen, Tero Nurmi, Jouni Isoaho, Hannu Tenhunen: Interconnection of autonomous error-tolerant cells. ISCAS (4) 2002: 473-476 | |
| 12 | Pasi Liljeberg, Imed Ben Dhaou, Juha Plosila, Jouni Isoaho, Hannu Tenhunen: Interconnect peak current reduction for wavelet array processor using self-timed signaling. ISCAS (4) 2002: 485-488 | |
| 2001 | ||
| 11 | Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Asynchronous interface for locally clocked modules in ULSI systems. ISCAS (4) 2001: 170-173 | |
| 10 | T. Santti, Jouni Isoaho: Modified SRCMOS cell for high-throughput wave-pipelined arithmetic units. ISCAS (4) 2001: 194-197 | |
| 9 | T. Suutari, Jouni Isoaho, Hannu Tenhunen: High-speed serial communication with error correction using 0.25 um CMOS technology. ISCAS (4) 2001: 618-621 | |
| 1999 | ||
| 8 | Lihong Jia, Yonghong Gao, Jouni Isoaho, Hannu Tenhunen: Design of a super-pipelined Viterbi decoder. ISCAS (1) 1999: 133-136 | |
| 7 | L. Horvath, Imed Ben Dhaou, Hannu Tenhunen, Jouni Isoaho: A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T. ISCAS (4) 1999: 382-385 | |
| 6 | M. Kivioja, Jouni Isoaho, L. Vänskä: Design and Implementation of Viterbi Decoder with FPGAs. VLSI Signal Processing 21(1): 5-14 (1999) | |
| 1996 | ||
| 5 | Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani: A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. VLSI Design 1996: 133-139 | |
| 1994 | ||
| 4 | Jouni Isoaho, Axel Jantsch, Hannu Tenhunen: DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. FPL 1994: 318-320 | |
| 3 | Jouni Isoaho, Jari Nurmi: An Overall FIR Filter Optimization Tool for High Granularity Implementation Technologies. ISCAS 1994: 265-268 | |
| 1993 | ||
| 2 | Jouni Isoaho, Jari Pasanen, Olli Vainio, Hannu Tenhunen: DSP system integration and prototyping with FPGAS. VLSI Signal Processing 6(2): 155-172 (1993) | |
| 1992 | ||
| 1 | Jouni Isoaho, Arto Nummela, Hannu Tenhunen: Technologies and Utilization fo Field Programmable Gate Arrays. FPL 1992: 11-25 | |