K. Iwasaki

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1997

4 H. Goto, S. Nakamura, K. Iwasaki: Experimental fault analysis of 1 Mb SRAM chips. VTS 1997: 31-36

3 K. Iwasaki: Polytopes and the Mean Value Property. Discrete & Computational Geometry 17(2): 163-189 (1997)

1990

2 K. Iwasaki, F. Arakawa: An analysis of the aliasing probability of multiple-input signature registers in the case of a 2^m-ary symmetric channel. IEEE Trans. on CAD of Integrated Circuits and Systems 9(4): 427-438 (1990)

1988

1 K. Iwasaki: Analysis and proposal of signature circuits for LSI testing. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 84-90 (1988)

	1997
4		H. Goto, S. Nakamura, K. Iwasaki: Experimental fault analysis of 1 Mb SRAM chips. VTS 1997: 31-36
3		K. Iwasaki: Polytopes and the Mean Value Property. Discrete & Computational Geometry 17(2): 163-189 (1997)
	1990
2		K. Iwasaki, F. Arakawa: An analysis of the aliasing probability of multiple-input signature registers in the case of a 2^m-ary symmetric channel. IEEE Trans. on CAD of Integrated Circuits and Systems 9(4): 427-438 (1990)
	1988
1		K. Iwasaki: Analysis and proposal of signature circuits for LSI testing. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 84-90 (1988)

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