Vikram Iyengar

2007
34	EE	Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty, Vikram Iyengar: AWafer-Level Defect Screening Technique to Reduce Test and Packaging Costs for "Big-D/Small-A" Mixed-Signal SoCs. ASP-DAC 2007: 823-828
33	EE	Vikram Iyengar, Jinjun Xiong, Subbayyan Venkatesan, Vladimir Zolotov, David E. Lackey, Peter A. Habitz, Chandu Visweswariah: Variation-aware performance verification using at-speed structural test and statistical timing. ICCAD 2007: 405-412
32	EE	Vikram Iyengar, Kenneth Pichamuthu, Andrew Ferko, Frank Woytowich, David E. Lackey, Gary Grise, Mark Taylor, Mike Degregorio, Steven F. Oakland: An Integrated Framework for At-Speed and ATE-Driven Delay Test of Contract-Manufactured ASICs. VTS 2007: 173-178
2006
31	EE	Vikram Iyengar, Mark Johnson, Theo Anemikos, Bob Bassett, Mike Degregorio, Rudy Farmer, Gary Grise, Phil Stevens, Mark Taylor, Frank Woytowich: Performance verification of high-performance ASICs using at-speed structural test. ACM Great Lakes Symposium on VLSI 2006: 247-252
30	EE	Vikram Iyengar, Gary Grise, Mark Taylor: A flexible and scalable methodology for GHz-speed structural test. DAC 2006: 314-319
29	EE	Chunsheng Liu, Vikram Iyengar: Test scheduling with thermal optimization for network-on-chip systems using variable-rate on-chip clocking. DATE 2006: 652-657
28	EE	Chunsheng Liu, Vikram Iyengar, Dhiraj K. Pradhan: Thermal-Aware Testing of Network-on-Chip Using Multiple-Frequency Clocking. VTS 2006: 46-51
2005
27	EE	Vikram Iyengar, Phil Nigh: Defect-Oriented Test for Ultra-Low DPM. Asian Test Symposium 2005: 455
26	EE	Chunsheng Liu, Kugesh Veeraraghavant, Vikram Iyengar: Thermal-Aware Test Scheduling and Hot Spot Temperature Minimization for Core-Based Systems. DFT 2005: 552-562
25	EE	Chunsheng Liu, Vikram Iyengar, Jiangfan Shi, Érika F. Cota: Power-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking. VTS 2005: 349-354
24	EE	Krishnendu Chakrabarty, Vikram Iyengar, Mark D. Krasniewski: Test planning for modular testing of hierarchical SOCs. IEEE Trans. on CAD of Integrated Circuits and Systems 24(3): 435-448 (2005)
2004
23	EE	Anuja Sehgal, Vikram Iyengar, Krishnendu Chakrabarty: SOC test planning using virtual test access architectures. IEEE Trans. VLSI Syst. 12(12): 1263-1276 (2004)
2003
22	EE	Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty: Test cost reduction for SOCs using virtual TAMs and lagrange multipliers. DAC 2003: 738-743
21	EE	Vikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty: A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization. DATE 2003: 11188-11190
20	EE	Vikram Iyengar, Anshuman Chandra: A Uni.ed SOC Test Approach Based on Test Data Compression and TAM Design. DFT 2003: 511-518
19	EE	Vikram Iyengar, Krishnendu Chakrabarty, Mark D. Krasniewski, Gopind N. Kumar: Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs. VTS 2003: 299-312
18	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Test Access Mechanism Optimization, Test Scheduling, and Tester Data Volume Reduction for System-on-Chip. IEEE Trans. Computers 52(12): 1619-1632 (2003)
17	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Efficient test access mechanism optimization for system-on-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 635-643 (2003)
2002
16	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Recent Advances in Test Planning for Modular Testing of Core-Based SOCs. Asian Test Symposium 2002: 320-
15	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs. DAC 2002: 685-690
14	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Efficient Wrapper/TAM Co-Optimization for Large SOCs. DATE 2002: 491-498
13	EE	Vikram Iyengar, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints. ITC 2002: 1159-1168
12	EE	Erik Jan Marinissen, Vikram Iyengar, Krishnendu Chakrabarty: A Set of Benchmarks fo Modular Testing of SOCs. ITC 2002: 519-528
11	EE	Sandeep Koranne, Vikram Iyengar: On the Use of k-tuples for SoC Test Schedule Representation. ITC 2002: 539-548
10	EE	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization. VTS 2002: 253-258
9	EE	Vikram Iyengar, Krishnendu Chakrabarty: Test Bus Sizing for System-on-a-Chip. IEEE Trans. Computers 51(5): 449-459 (2002)
8	EE	Vikram Iyengar, Krishnendu Chakrabarty: System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 1088-1094 (2002)
2001
7		Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Test wrapper and test access mechanism co-optimization for system-on-chip. ITC 2001: 1023-1032
6	EE	Vikram Iyengar, Krishnendu Chakrabarty: Precedence-Based, Preemptive, and Power-Constrained Test Scheduling for System-on-a-Chip. VTS 2001: 368-374
2000
5		Hiroshi Date, Vikram Iyengar, Krishnendu Chakrabarty, Makoto Sugihara: Mathematical Modeling of Intellectual Property Protection Using Partially-Mergeable Cores. PDPTA 2000
4	EE	Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar: Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters. IEEE Trans. VLSI Syst. 8(5): 633-636 (2000)
1999
3	EE	Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar: Built-in Test Pattern Generation For High-Performance Cir cuits Using Twisted-Ring Counters. VTS 1999: 22-27
1998
2	EE	Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray: Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets. VTS 1998: 418-423
1997
1	EE	Vikram Iyengar, Krishnendu Chakrabarty: An Efficient Finite-State Machine Implementation of Huffman Decoders. Inf. Process. Lett. 64(6): 271-275 (1997)

Coauthor Index

1	Theo Anemikos	[31]
2	Sudarshan Bahukudumbi	[34]
3	Bob Bassett	[31]
4	Krishnendu Chakrabarty	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12] [13] [14] [15] [16] [17] [18] [19] [21] [22] [23] [24] [34]
5	Anshuman Chandra	[20] [21]
6	Érika F. Cota	[25]
7	Hiroshi Date	[5]
8	Mike Degregorio	[31] [32]
9	Rudy Farmer	[31]
10	Andrew Ferko	[32]
11	Sandeep Kumar Goel	[13]
12	Gary Grise	[30] [31] [32]
13	Peter A. Habitz	[33]
14	Mark Johnson	[31]
15	Sandeep Koranne	[11]
16	Mark D. Krasniewski	[19] [22] [24]
17	Gopind N. Kumar	[19]
18	David E. Lackey	[32] [33]
19	Chunsheng Liu	[25] [26] [28] [29]
20	Erik Jan Marinissen	[7] [10] [12] [13] [14] [15] [16] [17] [18]
21	Brian T. Murray	[2] [3] [4]
22	Phil Nigh	[27]
23	Steven F. Oakland	[32]
24	Sule Ozev	[34]
25	Kenneth Pichamuthu	[32]
26	Dhiraj K. Pradhan	[28]
27	Sharon Schweizer	[21]
28	Anuja Sehgal	[22] [23]
29	Jiangfan Shi	[25]
30	Phil Stevens	[31]
31	Makoto Sugihara	[5]
32	Mark Taylor	[30] [31] [32]
33	Kugesh Veeraraghavant	[26]
34	Subbayyan Venkatesan	[33]
35	Chandu Visweswariah	[33]
36	Frank Woytowich	[31] [32]
37	Jinjun Xiong	[33]
38	Vladimir Zolotov	[33]

Colors in the list of coauthors