Christophe Jégo

	2009
16		Christophe Jégo: FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. ERSA 2009: 9-18
15		Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel: High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. Signal Processing Systems 57(3): 349-361 (2009)
	2008
14		Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta: A highly parallel Turbo Product Code decoder without interleaving resource. SiPS 2008: 1-6
13		Saeed Sharifi Tehrani, Christophe Jégo, Bo Zhu, Warren J. Gross: Stochastic Decoding of Linear Block Codes With High-Density Parity-Check Matrices. IEEE Transactions on Signal Processing 56(11): 5733-5739 (2008)
	2007
12		Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel: Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS 2007: 909-912
11		Haisheng Liu, Jean-Philippe Diguet, Christophe Jégo, Michel Jézéquel, Emmanuel Boutillon: Energy Efficient Turbo Decoder with Reduced State Metric Quantization. SiPS 2007: 237-242
	2006
10		Irene Masinjara Mahafeno, Charlotte Langlais, Christophe Jégo: Reduced Complexity Iterative Multi-User Detector for IDMA (Interleave-Division Multiple Access) System. GLOBECOM 2006
9		Catherine Dezan, Christophe Jégo, Bernard Pottier, Christophe Gouyen, Loïc Lagadec: The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. HICSS 2006
8		Erwan Piriou, Christophe Jégo, Patrick Adde, Raphaël Le Bidan, Michel Jézéquel: Efficient architecture for Reed Solomon block turbo code. ISCAS 2006
7		Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel: A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. ISVLSI 2006: 430-431
6		Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel: Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. ReCoSoC 2006: 152-159
	2005
5		Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno: Hardware Virtual Components Compliant with Communication System Standards. DSD 2005: 88-95
4		Caaliph Andriamisaina, Catherine Dezan, Christophe Jégo, Bernard Pottier: Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit. ERSA 2005: 263-266
	2004
3		Emmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin: Reed-Solomon behavioral virtual component for communication systems. ISCAS (4) 2004: 173-176
2		Emmanuel Casseau, Christophe Jégo, Eric Martin: Synthèse architecturale d'applications temps réel pour technologies submicroniques. Technique et Science Informatiques 23(1): 35-66 (2004)
	1999
1		Christophe Jégo, Emmanuel Casseau, Eric Martin: Architectural Synthesis with Interconnection Cost Control. VLSI 1999: 509-520

Coauthor Index

1	Nabil Abdelli	[5]
2	Patrick Adde	[6] [7] [8] [12] [14] [15]
3	Caaliph Andriamisaina	[4]
4	Raphaël Le Bidan	[8]
5	Pierre Bomel	[5]
6	Emmanuel Boutillon	[11]
7	Emmanuel Casseau	[1] [2] [3] [5]
8	Catherine Dezan	[4] [9]
9	Jean-Philippe Diguet	[11]
10	Anne-Marie Fouilliart	[5]
11	Bertrand Le Gal	[3] [5]
12	Christophe Gouyen	[9]
13	Warren J. Gross	[13]
14	Deepak Gupta	[14]
15	Nathalie Le Heno	[3] [5]
16	Michel Jézéquel	[6] [7] [8] [11] [12] [14] [15]
17	Philippe Kajfasz	[5]
18	Loïc Lagadec	[9]
19	Charlotte Langlais	[10]
20	Camille Leroux	[12] [14] [15]
21	Haisheng Liu	[11]
22	Irene Masinjara Mahafeno	[10]
23	Eric Martin	[1] [2] [3]
24	Erwan Piriou	[6] [7] [8]
25	Bernard Pottier	[4] [9]
26	Saeed Sharifi Tehrani	[13]
27	Bo Zhu	[13]

Colors in the list of coauthors