| 2009 | ||
|---|---|---|
| 3 | Ki Chul Chun, Pulkit Jain, Chris H. Kim: A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM. ISLPED 2009: 119-120 | |
| 2008 | ||
| 2 | Dong Jiao, Jie Gu, Pulkit Jain, Chris H. Kim: Enhancing beneficial jitter using phase-shifted clock distribution. ISLPED 2008: 21-26 | |
| 1 | Pulkit Jain, Tae-Hyoung Kim, John Keane, Chris H. Kim: A multi-story power delivery technique for 3D integrated circuits. ISLPED 2008: 57-62 | |
| 1 | Ki Chul Chun | [3] |
| 2 | Jie Gu | [2] |
| 3 | Dong Jiao | [2] |
| 4 | John Keane | [1] |
| 5 | Chris H. Kim | [1] [2] [3] |
| 6 | Tae-Hyoung Kim | [1] |