 | 2009 |
|---|
| 8 |       | Andhi Janapsatya,
Sri Parameswaran,
Aleksandar Ignjatovic:
HitME: low power Hit MEmory buffer for embedded systems.
ASP-DAC 2009: 335-340 |
| 7 | | Mohammad Shihabul Haque,
Andhi Janapsatya,
Sri Parameswaran:
SuSeSim: a fast simulation strategy to find optimal L1 cache configuration for embedded systems.
CODES+ISSS 2009: 295-304 |
| 2007 |
|---|
| 6 | | Andhi Janapsatya,
Aleksandar Ignjatovic,
Sri Parameswaran,
Jörg Henkel:
Instruction trace compression for rapid instruction cache simulation.
DATE 2007: 803-808 |
| 2006 |
|---|
| 5 | | Andhi Janapsatya,
Aleksandar Ignjatovic,
Sri Parameswaran:
A novel instruction scratchpad memory optimization method based on concomitance metric.
ASP-DAC 2006: 612-617 |
| 4 | | Andhi Janapsatya,
Aleksandar Ignjatovic,
Sri Parameswaran:
Finding optimal L1 cache configuration for embedded systems.
ASP-DAC 2006: 796-801 |
| 3 | | Andhi Janapsatya,
Aleksandar Ignjatovic,
Sri Parameswaran:
Exploiting statistical information for implementation of instruction scratchpad memory in embedded system.
IEEE Trans. VLSI Syst. 14(8): 816-829 (2006) |
| 2005 |
|---|
| 2 | | Jorgen Peddersen,
Seng Lin Shee,
Andhi Janapsatya,
Sri Parameswaran:
Rapid Embedded Hardware/Software System Generation.
VLSI Design 2005: 111-116 |
| 2004 |
|---|
| 1 | | Andhi Janapsatya,
Sri Parameswaran,
Aleksandar Ignjatovic:
Hardware/software managed scratchpad memory for embedded system.
ICCAD 2004: 370-377 |
