| 2009 | ||
|---|---|---|
| 92 | Mikael Millberg, Axel Jantsch: Priority based forced requeue to reduce worst-case latencies for bursty traffic. DATE 2009: 1070-1075 | |
| 91 | Jun Zhu, Ingo Sander, Axel Jantsch: Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. DATE 2009: 1506-1511 | |
| 90 | Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson: Flow regulation for on-chip communication. DATE 2009: 578-581 | |
| 89 | Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrholz, Philipp A. Hartmann, Wolfgang Nebel: High-level estimation and trade-off analysis for adaptive real-time systems. IPDPS 2009: 1-4 | |
| 2008 | ||
| 88 | Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel: Heterogeneous System-level Specification Using SystemC. DATE 2008 | |
| 87 | Zhonghai Lu, Lei Xia, Axel Jantsch: Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip. DDECS 2008: 92-97 | |
| 86 | Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch: System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments. DSD 2008: 599-605 | |
| 85 | Jun Zhu, Ingo Sander, Axel Jantsch: Energy efficient streaming applications with guaranteed throughput on MPSoCs. EMSOFT 2008: 119-128 | |
| 84 | Jun Zhu, Ingo Sander, Axel Jantsch: Performance analysis of reconfiguration in adaptive real-time streaming applications. ESTImedia 2008: 53-58 | |
| 83 | Ming Liu, Johannes Lang, Shuo Yang, Tiago Perez, Wolfgang Kuehn, Hao Xu, Dapeng Jin, Qiang Wang, Lu Li, Zhen'An Liu, Zhonghai Lu, Axel Jantsch: ATCA-based computation platform for data acquisition and triggering in particle physics experiments. FPL 2008: 287-292 | |
| 82 | Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) | |
| 81 | Ingo Sander, Axel Jantsch: Modelling Adaptive Systems in ForSyDe. Electr. Notes Theor. Comput. Sci. 200(2): 39-54 (2008) | |
| 80 | Tiberiu Seceleanu, Axel Jantsch: Modeling Communication with Synchronized Environments. Fundam. Inform. 86(3): 343-369 (2008) | |
| 79 | Zhonghai Lu, Axel Jantsch: TDM Virtual-Circuit Configuration for Network-on-Chip. IEEE Trans. VLSI Syst. 16(8): 1021-1034 (2008) | |
| 78 | Tarvo Raudvere, Ingo Sander, Axel Jantsch: Application and Verification of Local Nonsemantic-Preserving Transformations in System Design. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1091-1103 (2008) | |
| 2007 | ||
| 77 | Tarvo Raudvere, Ingo Sander, Axel Jantsch: A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. ACM Great Lakes Symposium on VLSI 2007: 353-358 | |
| 76 | Tarvo Raudvere, Ingo Sander, Axel Jantsch: Synchronization after design refinements with sensitive delay elements. CODES+ISSS 2007: 21-26 | |
| 75 | Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luca Benini: Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions. CODES+ISSS 2007: 217-226 | |
| 74 | Zhonghai Lu, Ming Liu, Axel Jantsch: Layered Switching for Networks on Chip. DAC 2007: 122-127 | |
| 73 | Mikael Millberg, Axel Jantsch: Increasing NoC Performance and Utilisation using a Dual Packet Exit Strategy. DSD 2007: 511-518 | |
| 72 | Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, Alistair C. Bruce: Network Calculus Applied to Verification of Memory Access Performance in SoCs. ESTImedia 2007: 21-26 | |
| 71 | Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou: Traffic Splitting with Network Calculus for Mesh Sensor Networks. FGCN (2) 2007: 368-373 | |
| 70 | Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, F. Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, M. Martinez: The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. FPL 2007: 396-401 | |
| 69 | Zhonghai Lu, Axel Jantsch: Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. ICCAD 2007: 18-25 | |
| 68 | Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch: Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2007: 143-149 | |
| 67 | Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu: Towards Open Network-on-Chip Benchmarks. NOCS 2007: 205 | |
| 66 | Per Badlund, Axel Jantsch: An Analytical Approach for Dimensioning Mixed Traffic Networks. NOCS 2007: 215 | |
| 65 | Mikael Millberg, Axel Jantsch: A Study of NoC Exit Strategies. NOCS 2007: 217 | |
| 64 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) | |
| 63 | Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici: DATE 07 workshop on diagnostic services in NoCs. IEEE Design & Test of Computers 24(5): 510 (2007) | |
| 62 | Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology. T. HiPEAC 1: 239-258 (2007) | |
| 2006 | ||
| 61 | Zhonghai Lu, Mingchen Zhong, Axel Jantsch: Evaluation of on-chip networks using deflection routing. ACM Great Lakes Symposium on VLSI 2006: 296-301 | |
| 60 | Tiberiu Seceleanu, Axel Jantsch: Communicating with Synchronized Environments. ACSD 2006: 15-24 | |
| 59 | Axel Jantsch: Models of Computation for Networks on Chip. ACSD 2006: 165-178 | |
| 58 | Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis. Conf. Computing Frontiers 2006: 21-28 | |
| 57 | Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration. DAC 2006: 125-130 | |
| 56 | Zhonghai Lu, Ingo Sander, Axel Jantsch: Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. DSD 2006: 37-44 | |
| 55 | Guang Liang, Axel Jantsch: Adaptive Power Management for the On-Chip Communication Network. DSD 2006: 649-656 | |
| 54 | Sandro Penolazzi, Axel Jantsch: A High Level Power Model for the Nostrum NoC. DSD 2006: 673-676 | |
| 53 | Rikard Thid, Ingo Sander, Axel Jantsch: Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads. DSD 2006: 681-688 | |
| 52 | Zhonghai Lu, Bei Yin, Axel Jantsch: Connection-oriented Multicasting in Wormhole-switched Networks on Chip. ISVLSI 2006: 205-2110 | |
| 51 | Weixing Wang, Axel Jantsch: An algorithm for electing cluster heads based on maximum residual energy. IWCMC 2006: 1465-1470 | |
| 2005 | ||
| 50 | Petru Eles, Axel Jantsch, Reinaldo A. Bergamaschi: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005 ACM 2005 | |
| 49 | Zhonghai Lu, Axel Jantsch, Ingo Sander: Feasibility analysis of messages for on-chip networks using wormhole routing. ASP-DAC 2005: 960-964 | |
| 48 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303 | |
| 47 | Zhonghai Lu, Ingo Sander, Axel Jantsch: Refinement of Perfectly Synchronous Communication Model. FDL 2005: 453-465 | |
| 46 | Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch: System level verification of digital signal processing applications based on the polynomial abstraction technique. ICCAD 2005: 285-290 | |
| 45 | Axel Jantsch, Robert Lauter, Arseni Vitkovski: Power analysis of link level and end-to-end data protection in networks on chip. ISCAS (2) 2005: 1770-1773 | |
| 44 | Zhonghai Lu, Axel Jantsch: Traffic Configuration for Evaluating Networks on Chips. IWSOC 2005: 535-540 | |
| 2004 | ||
| 43 | Alex Orailoglu, Pai H. Chou, Petru Eles, Axel Jantsch: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004 ACM 2004 | |
| 42 | Abhijit K. Deb, Axel Jantsch, Johnny Öberg: System design for DSP applications in transaction level modeling paradigm. DAC 2004: 466-471 | |
| 41 | Abhijit K. Deb, Axel Jantsch, Johnny Öberg: System Design for DSP Applications Using the MASIC Methodology. DATE 2004: 630-635 | |
| 40 | Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch: Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. DATE 2004: 690-691 | |
| 39 | Mikael Millberg, Erland Nilsson, Rikard Thid, Axel Jantsch: Guaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip. DATE 2004: 890-895 | |
| 38 | Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch: The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip. VLSI Design 2004: 693-696 | |
| 37 | Ingo Sander, Axel Jantsch: System modeling and transformational design refinement in ForSyDe [formal system design]. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 17-32 (2004) | |
| 36 | Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch, Hannu Tenhunen: A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime. Integration 38(1): 3-17 (2004) | |
| 35 | Axel Jantsch, Johnny Öberg, Hannu Tenhunen: Special issue on networks on chip. Journal of Systems Architecture 50(2-3): 61-63 (2004) | |
| 2003 | ||
| 34 | Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Axel Jantsch: Verification of design decisions in ForSyDe. CODES+ISSS 2003: 176-181 | |
| 33 | Heiko Zimmer, Axel Jantsch: A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip. CODES+ISSS 2003: 188-193 | |
| 32 | Ingo Sander, Axel Jantsch, Zhonghai Lu: Development and Application of Design Transformations in ForSyDe. DATE 2003: 10364-10369 | |
| 31 | Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Simulation and Analysis of Embedded DSP Systems Using MASIC Methodology. DATE 2003: 11100-11101 | |
| 30 | Erland Nilsson, Mikael Millberg, Johnny Öberg, Axel Jantsch: Load Distribution with the Proximity Congestion Awareness in a Network on Chip. DATE 2003: 11126-11127 | |
| 29 | Axel Jantsch: NoCs: A new Contract between Hardware and Software. DSD 2003: 10-16 | |
| 28 | Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Simulation and Analysis of Embedded DSP Systems Using Petri Nets. IEEE International Workshop on Rapid System Prototyping 2003: 64-70 | |
| 27 | Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar: Extending Platform-Based Design to Network on Chip Systems. VLSI Design 2003: 401- | |
| 26 | Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch: Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures. VLSI-SOC 2003: 362- | |
| 2002 | ||
| 25 | Per Bjuréus, Mikael Millberg, Axel Jantsch: FPGA resource and timing estimation from Matlab execution traces. CODES 2002: 31-36 | |
| 24 | Ingo Sander, Axel Jantsch: Transformation based communication and clock domain refinement for system design. DAC 2002: 281-286 | |
| 23 | Ingo Sander, Axel Jantsch, Zhonghai Lu: A Case Study of Hardware and Software Synthesis in ForSyDe. ISSS 2002: 86-91 | |
| 22 | Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani: A Network on Chip Architecture and Design Methodology. ISVLSI 2002: 117-124 | |
| 2001 | ||
| 21 | Axel Jantsch, Ingo Sander, Wenbiao Wu: The usage of stochastic processes in embedded system specifications. CODES 2001: 5-10 | |
| 20 | Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Control and communication performance analysis of embedded DSP systems in the MASIC methodology. ISSS 2001: 274-273 | |
| 19 | Per Bjuréus, Axel Jantsch: Performance analysis with confidence intervals for embedded software processes. ISSS 2001: 45-50 | |
| 18 | Per Bjuréus, Axel Jantsch: Modeling of mixed control and dataflow systems in MASCOT. IEEE Trans. VLSI Syst. 9(5): 690-703 (2001) | |
| 17 | Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, Ahmed Hemani: Grammar-based design of embedded systems. Journal of Systems Architecture 47(3-4): 225-240 (2001) | |
| 2000 | ||
| 16 | Axel Jantsch, Ingo Sander: On the roles of functions and objects in system specification. CODES 2000: 8-12 | |
| 15 | Axel Jantsch, Per Bjuréus: Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors. DATE 2000: 154-160 | |
| 14 | Per Bjuréus, Axel Jantsch: MASCOT: A Specification and Cosimulation Method Integrating Data and Control Flow. DATE 2000: 161-168 | |
| 13 | Johan Ditmar, Kjell Torkelsson, Axel Jantsch: A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization. FPL 2000: 19-28 | |
| 12 | Axel Jantsch, Shashi Kumar, Ahmed Hemani: A Metamodel for Studying Concepts in Electronic System Design. IEEE Design & Test of Computers 17(3): 78-85 (2000) | |
| 1999 | ||
| 11 | Ingo Sander, Axel Jantsch: System synthesis utilizing a layered functional model. CODES 1999: 136-140 | |
| 10 | Axel Jantsch, Shashi Kumar, Ahmed Hemani: The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems. DATE 1999: 256-262 | |
| 9 | Mattias O'Nils, Axel Jantsch: Operating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification. DATE 1999: 562-567 | |
| 8 | Mattias O'Nils, Axel Jantsch: Synthesis of DMA Controllers from Architecture Independent Descriptions of HW/SW Communication Protocols. VLSI Design 1999: 138-145 | |
| 7 | Ingo Sander, Axel Jantsch: Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons. VLSI Design 1999: 318-323 | |
| 1998 | ||
| 6 | Mattias O'Nils, Johnny Öberg, Axel Jantsch: Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces. EUROMICRO 1998: 10055-10058 | |
| 5 | Johnny Öberg, Axel Jantsch, Anshul Kumar: An Object-Oriented Concept for Intelligent Library Functions. VLSI Design 1998: 355-358 | |
| 1996 | ||
| 4 | Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani: A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. VLSI Design 1996: 133-139 | |
| 3 | Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen: A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. VLSI Design 1996: 23-28 | |
| 1994 | ||
| 2 | Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen: Hardware/software partitioning and minimizing memory interface traffic. EURO-DAC 1994: 226-231 | |
| 1 | Jouni Isoaho, Axel Jantsch, Hannu Tenhunen: DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. FPL 1994: 318-320 | |