| 2002 | ||
|---|---|---|
| 6 | Majid Sarrafzadeh, Rajeev Jayaraman: Guest editorial. ACM Trans. Design Autom. Electr. Syst. 7(4): 499-500 (2002) | |
| 2001 | ||
| 5 | Rob A. Rutenbar, Max Baron, Thomas Daniel, Rajeev Jayaraman, Zvi Or-Bach, Jonathan Rose, Carl Sechen: Panel: (When) Will FPGAs Kill ASICs? DAC 2001: 321-322 | |
| 4 | Rajeev Jayaraman: Physical design for FPGAs. ISPD 2001: 214-221 | |
| 2000 | ||
| 3 | Jason Helge Anderson, Jim Saunders, Sudip Nag, Chari Madabhushi, Rajeev Jayaraman: A Placement Algorithm for FPGA Designs with Multiple I/O Standards. FPL 2000: 211-220 | |
| 1998 | ||
| 2 | Emil S. Ochotta, Patrick J. Crotty, Charles R. Erickson, Chih-Tsung Huang, Rajeev Jayaraman, Richard C. Li, Joseph D. Linoff, Luan Ngo, Hy V. Nguyen, Kerry M. Pierce, Douglas P. Wieland, Jennifer Zhuang, Scott S. Nance: A Novel Predictable Segmented FPGA Routing Architecture. FPGA 1998: 3-11 | |
| 1991 | ||
| 1 | Rajeev Jayaraman, Rob A. Rutenbar: A Parallel Steiner Heuristic for Wirelength Estimation of Large Net Populations. ICCAD 1991: 344-347 | |