Matthew D. Jennings Coauthor index DBLP Vis pubzone.org

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4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHuiyang Zhou, Matthew D. Jennings, Thomas M. Conte: Tree Traversal Scheduling: A Global Instruction Scheduling Technique for VLIW/EPIC Processors. LCPC 2001: 223-238
1998
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte: Value Speculation Scheduling for High Performance Processors. ASPLOS 1998: 262-271
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEmre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte: A Fast Interrupt Handling Scheme for VLIW Processors. IEEE PACT 1998: 136-141
1997
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLThomas M. Conte, Pradeep K. Dubey, Matthew D. Jennings, Ruby B. Lee, Alex Peleg, Salliah Rathnam, Michael S. Schlansker, Peter Song, Andrew Wolfe: Challenges to Combining General-Purpose and Multimedia Processors. IEEE Computer 30(12): 33-37 (1997)

Coauthor Index

1Sanjeev Banerjia [2]
2Thomas M. Conte [1] [2] [3] [4]
3Pradeep K. Dubey [1]
4Chao-ying Fu [3]
5Sergei Y. Larin [3]
6Ruby B. Lee [1]
7Kishore N. Menezes [2]
8Emre Özer [2]
9Alex Peleg [1]
10Salliah Rathnam [1]
11Sumedh W. Sathaye [2]
12Michael S. Schlansker [1]
13Peter Song [1]
14Andrew Wolfe [1]
15Huiyang Zhou [4]

Copyright © Mon Dec 7 15:48:47 2009 by Michael Ley (ley@uni-trier.de)