Yanming Jia

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2008

3 Yanming Jia, Yici Cai, Xianlong Hong: Full-chip routing system for reducing Cu CMP & ECP variation. SBCCI 2008: 10-15

2 Yanming Jia, Yici Cai, Xianlong Hong: Dummy Fill Aware Buffer Insertion after Layer Assignment Based on an Effective Estimation Model. IEICE Transactions 91-A(12): 3783-3792 (2008)

2007

1 Yanming Jia, Yici Cai, Xianlong Hong: Dummy fill aware buffer insertion during routing. ACM Great Lakes Symposium on VLSI 2007: 31-36

	2008
3		Yanming Jia, Yici Cai, Xianlong Hong: Full-chip routing system for reducing Cu CMP & ECP variation. SBCCI 2008: 10-15
2		Yanming Jia, Yici Cai, Xianlong Hong: Dummy Fill Aware Buffer Insertion after Layer Assignment Based on an Effective Estimation Model. IEICE Transactions 91-A(12): 3783-3792 (2008)
	2007
1		Yanming Jia, Yici Cai, Xianlong Hong: Dummy fill aware buffer insertion during routing. ACM Great Lakes Symposium on VLSI 2007: 31-36

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