Eugene John

	2009
14		Binu John, Pradeep Nair, Eugene John, Fred Hudson: Performance Measurement of Single, Dual and Quad Core Machines Using SPEC CPU2006. CDES 2009: 143-149
13		Ciji Isen, Lizy K. John, Eugene John: A Tale of Two Processors: Revisiting the RISC-CISC Debate. SPEC Benchmark Workshop 2009: 57-76
	2008
12		Pradeep Nair, Savithra Eratne, Eugene John: Effects of Register File Organization on Leakage Power Consumption. CDES 2008: 85-88
11		Savithra Eratne, Sebastian Puthenpurayil, Eugene John: Energy Efficiency of Data Compression with Wavelets. IPCV 2008: 75-78
	2007
10		Pradeep Nair, Eugene John: Performance Analysis of an Intel Pentium-4 Based Personal Computer for Multiplke Sequence Alignment. CDES 2007: 74-77
	2006
9		Pradeep Nair, Eugene John: Performance of Sequence Alignment Bioinformatics Applications on General Purpose Processors: A Case Study. BIOCOMP 2006: 556-559
8		Pradeep Nair, Dhireesha Kudithipudi, Eugene John, Fred Hudson: Performance Analysis of Embedded Applications on a Pentium-4 Based Machine. ESA 2006: 191-197
7		Byeong Kil Lee, Lizy Kurian John, Eugene John: Architectural enhancements for network congestion control applications. IEEE Trans. VLSI Syst. 14(6): 609-615 (2006)
	2005
6		Byeong Kil Lee, Lizy Kurian John, Eugene John: Architectural Support for Accelerating Congestion Control Applications in Network Processors. ASAP 2005: 169-178
5		Dhireesha Kudithipudi, Eugene John: Parametrical characterization of leakage power in embedded system caches using gated-VSS. Circuits, Signals, and Systems 2005: 308-312
4		Dhireesha Kudithipudi, Eugene John: Implementation of Low Power Digital Multipliers using 10 -Transistor Adder Blocks. J. Low Power Electronics 1(3): 286-296 (2005)
	2004
3		Dhireesha Kudithipudi, R. Kotha, Eugene John, Z. Pantic-Tanner: Impact of nanotechnology on the performance of CMOS digital multipliers. Circuits, Signals, and Systems 2004: 439-442
	1999
2		R. Shalem, Lizy Kurian John, Eugene John: A Novel Low Power Energy Recovery Full Adder Cell. Great Lakes Symposium on VLSI 1999: 380-
	1995
1		Lizy Kurian John, Daniel Brewer, Eugene John: Design of a highly reconfigurable interconnect for array processors. VLSI Design 1995: 321-325

Coauthor Index

1	Daniel Brewer	[1]
2	Savithra Eratne	[11] [12]
3	Fred Hudson	[8] [14]
4	Ciji Isen	[13]
5	Binu John	[14]
6	Lizy Kurian John (Lizy K. John)	[1] [2] [6] [7] [13]
7	R. Kotha	[3]
8	Dhireesha Kudithipudi	[3] [4] [5] [8]
9	Byeong Kil Lee	[6] [7]
10	Pradeep Nair	[8] [9] [10] [12] [14]
11	Z. Pantic-Tanner	[3]
12	Sebastian Puthenpurayil	[11]
13	R. Shalem	[2]

Colors in the list of coauthors