Larry G. Jones Coauthor index DBLP Vis pubzone.org

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DBLP keys1997
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMohankumar Guruswamy, Robert L. Maziasz, Daniel Dulitz, Srilata Raman, Venkat Chiluvuri, Andrea Fernandez, Larry G. Jones: CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries. DAC 1997: 327-332
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSergey Gavrilov, Alexey Glebov, S. Rusakov, David Blaauw, Larry G. Jones, Gopalakrishnan Vijayan: Fast power loss calculation for digital static CMOS circuits. ED&TC 1997: 411-415
1995
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAlexey Glebov, David Blaauw, Larry G. Jones: Transistor reordering for low power CMOS gates using an SP-BDD representation. ISLPD 1995: 161-166
1994
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrilata Raman, C. L. Liu, Larry G. Jones: A delay driven FPGA placement algorithm. EURO-DAC 1994: 277-282
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones, David Blaauw: A cache-based method for accelerating switch-level simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 13(2): 211-218 (1994)
1992
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones: Zero Delay versus Positive Delay in an Incremental Switch-Level Simulator. DAC 1992: 424-427
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones: An incremental zero/integer delay switch-level simulation environment. IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1131-1139 (1992)
1991
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones: Accelerating Switch-Level Simulation by Function Caching. DAC 1991: 211-214
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones: Fast batch incremental netlist compilation hierarchical schematics. IEEE Trans. on CAD of Integrated Circuits and Systems 10(7): 922-931 (1991)
1990
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones: Efficient Evaluation of Circular Attribute Grammars. ACM Trans. Program. Lang. Syst. 12(3): 429-462 (1990)
1986
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLarry G. Jones, Janos Simon: Hierarchical VLSI Design Systems Based on Attribute Grammars. POPL 1986: 58-69

Coauthor Index

1David Blaauw (David T. Blaauw) [7] [9] [10]
2Venkat Chiluvuri [11]
3Daniel Dulitz [11]
4Andrea Fernandez [11]
5Sergey Gavrilov [10]
6Alexey Glebov [9] [10]
7Mohankumar Guruswamy [11]
8C. L. Liu (Chung Laung (Dave) Liu) [8]
9Robert L. Maziasz [11]
10Srilata Raman [8] [11]
11S. Rusakov [10]
12Janos Simon [1]
13Gopalakrishnan Vijayan [10]

Colors in the list of coauthors

Copyright © Tue Dec 1 12:01:14 2009 by Michael Ley (ley@uni-trier.de)