J. Robert Jump

	1994
31		H. A. Rizvi, James B. Sinclair, J. Robert Jump, J. Carson: Execution-Driven Simulation of a Superscalar Processor. HICSS (1) 1994: 185-194
30		Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair: Execution-Driven Simulation of Multiprocessors: Address and Timing Analysis. ACM Trans. Model. Comput. Simul. 4(4): 314-338 (1994)
	1993
29		J. Robert Jump, Sridhar Lakshmanamurthy: NETSIM: A General-Purpose Interconnection Network Simulator. MASCOTS 1993: 121-125
28		Sandhya Dwarkadas, J. Robert Jump, R. Mukherjee, James B. Sinclair: Execution-Driven Simulation of Shared-Memory Multiprocessors. MASCOTS 1993: 83-86
	1991
27		R. G. Convington, Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair, Sridhar Madala: Efficient Simulation of Parallel Computer Systems. International Journal in Computer Simulation 1(1): (1991)
	1990
26		W. P. Dawkins, V. Debbad, J. Robert Jump, James B. Sinclair: Efficient Simulation of Multiprogramming. SIGMETRICS 1990: 237-238
25		David T. Harper III, J. Robert Jump: Evaluation of Reduced Bandwidth Multistage Networks. J. Parallel Distrib. Comput. 9(3): 304-311 (1990)
	1989
24		Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair: Efficient simulation of cache memories. Winter Simulation Conference 1989: 1032-1041
	1988
23		R. C. Covington, Sridhar Madala, V. Mehta, J. Robert Jump, James B. Sinclair: The Rice Parallel Processing Testbed. SIGMETRICS 1988: 4-11
	1987
22		David T. Harper III, J. Robert Jump: Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. ISCA 1987: 171-175
21		David T. Harper III, J. Robert Jump: Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. IEEE Trans. Computers 36(12): 1440-1449 (1987)
	1986
20		David T. Harper III, J. Robert Jump: Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. ISCA 1986: 324-328
19		Manoj Kumar, J. Robert Jump: Performance of Unbuffered Shuffle-Exchange Networks. IEEE Trans. Computers 35(6): 573-578 (1986)
	1985
18		G. Wolf, J. Robert Jump: Matrix Multiplication in an Interleaved Array Processing Architecture. ISCA 1985: 11-17
17		Manoj Kumar, Daniel M. Dias, J. Robert Jump: Switching Strategies in Shuffle-Exchange Packet-Switched Networks. IEEE Trans. Computers 34(2): 180-186 (1985)
	1984
16		J. Robert Jump, J. D. Wise, David T. Harper III: An interleaved array-processing architecture. AFIPS National Computer Conference 1984: 93-100
	1983
15		Manoj Kumar, J. Robert Jump: Generalized Delta Networks. ICPP 1983: 10-18
14		Manoj Kumar, Daniel M. Dias, J. Robert Jump: Switching Strategies in a Class of Packet Switching Networks ISCA 1983: 284-300
	1982
13		Daniel M. Dias, J. Robert Jump: Augmented and pruned n log n multistaged networks: topology and performance. ICPP 1982: 10-12
	1981
12		Daniel M. Dias, J. Robert Jump: Packet Switching Interconnection Networks for Modular Systems. IEEE Computer 14(12): 43-53 (1981)
11		Daniel M. Dias, J. Robert Jump: Analysis and Simulation of Buffered Delta Networks. IEEE Trans. Computers 30(4): 273-282 (1981)
	1979
10		N. D. Jotwani, J. Robert Jump: Top-Down Design in the Context of Parallel Programs Information and Control 40(3): 241-257 (1979)
9		Susan E. Conry, J. Robert Jump: On Functional Equivalences in a Model for Parallel Computation Information and Control 41(3): 247-274 (1979)
	1978
8		J. Robert Jump, Sudhir Ahuja: Effective Pipelining of Digital Systems. IEEE Trans. Computers 27(9): 855-865 (1978)
	1977
7		S. R. Ahuja, J. Robert Jump: A Modular Memory Scheme for Array Processing. ISCA 1977: 90-94
	1975
6		J. Robert Jump, P. S. Thiagarajan: On the Interconnection of Asynchronous Control Structures. J. ACM 22(4): 596-612 (1975)
	1974
5		J. Robert Jump, Jayang S. Kirtane: On the Interconnection Structure of Cellular Networks Information and Control 24(1): 74-91 (1974)
	1973
4		J. Robert Jump, P. S. Thiagarajan: On the Equivalence of Asynchronous Control Structures. SIAM J. Comput. 2(2): 67-87 (1973)
	1972
3		J. Robert Jump, P. S. Thiagarajan: On the Equivalence of Asynchronous Control Structures FOCS 1972: 212-223
	1971
2		J. Robert Jump, Shreehari Marathe: On the Length of Feedback Shift Registers Information and Control 19(4): 345-352 (1971)
	1969
1		J. Robert Jump: A Note on the Iterative Decomposition of Finite Automata Information and Control 15(5): 424-435 (1969)

Coauthor Index

1	S. R. Ahuja	[7]
2	Sudhir Ahuja	[8]
3	J. Carson	[31]
4	Susan E. Conry	[9]
5	R. G. Convington	[27]
6	R. C. Covington	[23]
7	W. P. Dawkins	[26]
8	V. Debbad	[26]
9	Daniel M. Dias	[11] [12] [13] [14] [17]
10	Sandhya Dwarkadas	[24] [27] [28] [30]
11	David T. Harper III	[16] [20] [21] [22] [25]
12	N. D. Jotwani	[10]
13	Jayang S. Kirtane	[5]
14	Manoj Kumar	[14] [15] [17] [19]
15	Sridhar Lakshmanamurthy	[29]
16	Sridhar Madala	[23] [27]
17	Shreehari Marathe	[2]
18	V. Mehta	[23]
19	R. Mukherjee	[28]
20	H. A. Rizvi	[31]
21	James B. Sinclair	[23] [24] [26] [27] [28] [30] [31]
22	P. S. Thiagarajan	[3] [4] [6]
23	J. D. Wise	[16]
24	G. Wolf	[18]

Colors in the list of coauthors