Artur Jutman Coauthor index DBLP Vis pubzone.org

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DBLP keys2008
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRaimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman: Parallel fault backtracing for calculation of fault coverage. ASP-DAC 2008: 667-672
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLArtur Jutman, Anton Tsertov, Raimund Ubar: Calculation of LFSR Seed and Polynomial Pair for BIST Applications. DDECS 2008: 275-278
2007
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRaimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman: Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs. European Test Symposium 2007: 131-136
2006
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomas Bengtsson, Artur Jutman, Shashi Kumar, Raimund Ubar, Zebo Peng: Off-Line Testing of Delay Faults in NoC Interconnects. DSD 2006: 677-680
2005
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLArtur Jutman, Jaan Raik, Raimund Ubar, V. Vislogubov: An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform. DSD 2005: 412-419
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman: Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs. EDCC 2005: 332-344
2001
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRaimund Ubar, Artur Jutman, Zebo Peng: Timing simulation of digital circuits with binary decision diagrams. DATE 2001: 460-466

Coauthor Index

1Tomas Bengtsson [4]
2Sergei Devadze [2] [5] [7]
3Shashi Kumar [4]
4Zebo Peng [1] [4]
5Jaan Raik [2] [3] [5] [7]
6Anton Tsertov [6]
7Raimund Ubar [1] [2] [3] [4] [5] [6] [7]
8V. Vislogubov [3]

Copyright © Fri Dec 4 16:04:45 2009 by Michael Ley (ley@uni-trier.de)