T. Venkata Kalyan

	2012
3		C. J. Janraj, T. Venkata Kalyan, Tripti Warrier, Madhu Mutyam: Way Sharing Set Associative Cache Architecture. VLSI Design 2012: 251-256
	2008
2		T. Venkata Kalyan, Madhu Mutyam: Word-interleaved cache: an energy efficient data cache architecture. ISLPED 2008: 265-270
1		T. Venkata Kalyan, Madhu Mutyam, P. Vijaya Sankara Rao: Exploiting Variable Cycle Transmission for Energy-Efficient On-Chip Interconnect Design. VLSI Design 2008: 235-241

Coauthor Index

1	C. J. Janraj	[3]
2	Madhu Mutyam	[1] [2] [3]
3	P. Vijaya Sankara Rao	[1]
4	Tripti Warrier	[3]

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