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9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWenyi Feng, Sinan Kaptanoglu: Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy. TRETS 1(1): (2008)
2007
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWenyi Feng, Sinan Kaptanoglu: Designing efficient input interconnect blocks for LUT clusters using counting and entropy. FPGA 2007: 23-32
2004
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini: Improving FPGA Performance and Area Using an Adaptive Logic Module. FPL 2004: 135-144
2003
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSinan Kaptanoglu: System LSI Implementation Fabrics for the Future (special panel discussion). ICCD 2003: 410-
2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSinan Kaptanoglu, John East, Tim Garverick, Scott Hauck, Tavana Tavana, Steven Trimberger, Ronnie Vasishta: Is marriage in the cards for programmable logic, microprocessors and ASICs? FPGA 2001: 111
1999
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting: A New High Density and Very Low Cost Reprogrammable FPGA Architecture. FPGA 1999: 3-12
1998
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJonathan Rose, Sinan Kaptanoglu, Clive McCarthy, Rob Smith, Sandip Vij, Steve Taylor: Constraints from Hell: How to Tell Makes a Good FPGA (Panel). FPGA 1998: 117-119
1990
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJonathan W. Greene, Vwani P. Roychowdhury, Sinan Kaptanoglu, Abbas El Gamal: Segmented Channel Routing. DAC 1990: 567-572
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJohn Valainis, Sinan Kaptanoglu, Erwin Liu, Roberto Suaya: Two-dimensional IC layout compaction based on topological design rule checking. IEEE Trans. on CAD of Integrated Circuits and Systems 9(3): 260-275 (1990)

Coauthor Index

1Gregg Baeckler [7]
2Greg Bakker [4]
3Mark Bourgeault [7]
4Ivan Corneillet [4]
5John East [5]
6Wenyi Feng [8] [9]
7Abbas El Gamal (Abbas A. El Gamal) [2]
8Tim Garverick [5]
9Jonathan W. Greene [2]
10Scott Hauck [5]
11Michael Hutton (Michael D. Hutton, Mike Hutton) [7]
12Henry Kim [7]
13Arun Kundu [4]
14Andy Lee [7]
15David M. Lewis [7]
16Erwin Liu [1]
17Clive McCarthy [3]
18Ketan Padalia [7]
19Bruce Pedersen [7]
20Boris Ratchev [7]
21Jonathan Rose [3]
22Vwani P. Roychowdhury [2]
23Rahul Saini [7]
24Jay Schleicher [7]
25Rob Smith [3]
26Roberto Suaya [1]
27Tavana Tavana [5]
28Steve Taylor [3]
29Ben Ting [4]
30Steven Trimberger [5]
31John Valainis [1]
32Ronnie Vasishta [5]
33Sandip Vij [3]
34Richard Yuan [7]

Colors in the list of coauthors

Copyright © Sat Nov 14 20:26:04 2009 by Michael Ley (ley@uni-trier.de)