Srinivas Katkoori

2008
41	EE	Hariharan Sankaran, Srinivas Katkoori: Bus Binding, Re-ordering, and Encoding for Crosstalk-Producing Switching Activity Minimization during High Level Synthesis. DELTA 2008: 454-457
40	EE	Pradeep Fernando, Srinivas Katkoori: An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning. VLSI Design 2008: 337-342
39	EE	Vyas Krishnan, Srinivas Katkoori: Clock Period Minimization with Iterative Binding Based on Stochastic Wirelength Estimation during High-Level Synthesis. VLSI Design 2008: 641-646
2007
38	EE	Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Mohammad Mojarradi, Srinivas Katkoori, Taher Daud: Adaptive and Evolvable Analog Electronics for Space Applications. ICES 2007: 379-390
37	EE	Vyas Krishnan, Srinivas Katkoori: A 3D-Layout Aware Binding Algorithm for High-Level Synthesis of Three-Dimensional Integrated Circuits. ISQED 2007: 885-892
36	EE	Soumyaroop Roy, Srinivas Katkoori, Nagarajan Ranganathan: A Compiler Based Leakage Reduction Technique by Power-Gating Functional Units in Embedded Microprocessors. VLSI Design 2007: 215-220
35	EE	Vyas Krishnan, Srinivas Katkoori: Minimizing wire delays by net-topology aware binding during floorplan- driven high level synthesis. VLSI-SoC 2007: 99-104
2006
34	EE	Adrian Stoica, Ricardo Salem Zebulum, Didier Keymeulen, Rajeshuni Ramesham, Joseph Neff, Srinivas Katkoori: Temperature-Adaptive Circuits on Reconfigurable Analog Arrays. AHS 2006: 28-31
33	EE	Didier Keymeulen, Ricardo Salem Zebulum, Rajeshuni Ramesham, Adrian Stoica, Srinivas Katkoori, Sharon Graves, Frank Novak, Charles Antill: Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics. AHS 2006: 296-300
32	EE	Vyas Krishnan, Srinivas Katkoori: Design Space Exploration of RTL Datapaths Using Rent Parameter based Stochastic Wirelength Estimation. ISQED 2006: 364-369
31	EE	Vyas Krishnan, Srinivas Katkoori: A genetic algorithm for the design space exploration of datapaths during high-level synthesis. IEEE Trans. Evolutionary Computation 10(3): 213-229 (2006)
2005
30	EE	Ranganath Gopalan, Chandramouli Gopalakrishnan, Srinivas Katkoori: Leakage Power Driven Behavioral Synthesis of Pipelined Datapaths. ISVLSI 2005: 167-172
29	EE	Hariharan Sankaran, Srinivas Katkoori, Umadevi Kailasam: System Level Energy Optimization for Location Aware Computing. PerCom 2005: 319-323
28	EE	Suvodeep Gupta, Srinivas Katkoori, Hariharan Sankaran: Floorplan-Based Crosstalk Estimation for Macrocell-Based Designs. VLSI Design 2005: 463-468
27	EE	Suvodeep Gupta, Srinivas Katkoori: Intrabus crosstalk estimation using word-level statistics. IEEE Trans. on CAD of Integrated Circuits and Systems 24(3): 469-478 (2005)
2004
26	EE	Suvodeep Gupta, Srinivas Katkoori: A Fast Word-Level Statistical Estimator of Intra-Bus Crosstalk. DATE 2004: 1110-1115
25	EE	Hao Li, Wai-Kei Mak, Srinivas Katkoori: Force-Directed Performance-Driven Placement Algorithm for FPGAs. ISVLSI 2004: 193-198
24	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths. ISVLSI 2004: 260-261
23	EE	Suvodeep Gupta, Srinivas Katkoori: Intra-Bus Crosstalk Estimation Using Word-Level Statistics. VLSI Design 2004: 449-454
22	EE	Stelian Alupoaei, Srinivas Katkoori: Energy Model Based Macrocell Placement for Wirelength Minimization. VLSI Design 2004: 713-716
21	EE	Stelian Alupoaei, Srinivas Katkoori: Ant Colony Optimization Technique for Macrocell Overlap Removal. VLSI Design 2004: 963-968
20	EE	Hao Li, Srinivas Katkoori, Wai-Kei Mak: Power minimization algorithms for LUT-based FPGA technology mapping. ACM Trans. Design Autom. Electr. Syst. 9(1): 33-51 (2004)
19	EE	Stelian Alupoaei, Srinivas Katkoori: Ant colony system application to macrocell overlap removal. IEEE Trans. VLSI Syst. 12(10): 1118-1123 (2004)
18	EE	Stelian Alupoaei, Srinivas Katkoori: Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement. VLSI Signal Processing 37(1): 151-163 (2004)
2003
17	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: KnapBind: An Area-Efficient Binding Algorithm for Low-leakage Datapaths. ICCD 2003: 430-435
16	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: An Architectural Leakage Power Simulator for VHDL Structural Datapaths. ISVLSI 2003: 211-212
15	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: Resource Allocation and Binding Approach for Low Leakage Power. VLSI Design 2003: 297-302
2002
14	EE	Stelian Alupoaei, Srinivas Katkoori: Net Clustering Based Macrocell Placement. ASP-DAC 2002: 399-406
13	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: Power Optimization of Combinational Circuits by Input Transformations. DELTA 2002: 154-158
12	EE	Chandramouli Gopalakrishnan, Srinivas Katkoori: Behavioral synthesis of datapaths with low leakage power. ISCAS (4) 2002: 699-702
11	EE	Suvodeep Gupta, Srinivas Katkoori: Force-Directed Scheduling for Dynamic Power Optimization. ISVLSI 2002: 75-82
10	EE	Stelian Alupoaei, Srinivas Katkoori: Net Clustering Based Macrocell Placement. VLSI Design 2002: 399-
9	EE	Ranga Vemuri, Srinivas Katkoori, Meenakshi Kaul, Jay Roy: An efficient register optimization algorithm for high-level synthesis from hierarchical behavioral specifications. ACM Trans. Design Autom. Electr. Syst. 7(1): 189-216 (2002)
8	EE	Stelian Alupoaei, Srinivas Katkoori: Net-based force-directed macrocell placement for wirelength optimization. IEEE Trans. VLSI Syst. 10(6): 824-835 (2002)
1999
7	EE	Srinivas Katkoori, Ranga Vemuri: Accurate Resource Estimation Algorithms for Behavioral Synthesis. Great Lakes Symposium on VLSI 1999: 338-339
6		Ananth Durbha, Srinivas Katkoori: RT-level Route-and-Place Design Methodology for Interconnect Optimization in DSM Regime. VLSI 1999: 427-438
1996
5	EE	Srinivas Katkoori, Ranga Vemuri: Simulation based architectural power estimation for PLA-based controllers. ISLPED 1996: 121-124
4	EE	Srinivas Katkoori, Ranga Vemuri, Jay Roy: A Hierarchical Register Optimization Algorithm for Behavioral Synthesis. VLSI Design 1996: 126-132
1995
3	EE	Srinivas Katkoori, Nand Kumar, Ranga Vemuri: High level profiling based low power synthesis technique. ICCD 1995: 446-
2	EE	Nand Kumar, Srinivas Katkoori, Leo Rader, Ranga Vemuri: Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems. IEEE Design & Test of Computers 12(3): 70-84 (1995)
1994
1		Dinesh Bhatia, Ramesh Rajagopalan, Srinivas Katkoori: Hierarchical Reconfiguration of VLSI/WSI Arrays. VLSI Design 1994: 349-352

Coauthor Index

1	Stelian Alupoaei	[8] [10] [14] [18] [19] [21] [22]
2	Charles Antill	[33]
3	Dinesh Bhatia	[1]
4	Taher Daud	[38]
5	Ananth Durbha	[6]
6	Pradeep Fernando	[40]
7	Chandramouli Gopalakrishnan	[12] [13] [15] [16] [17] [24] [30]
8	Ranganath Gopalan	[30]
9	Sharon Graves	[33]
10	Suvodeep Gupta	[11] [23] [26] [27] [28]
11	Umadevi Kailasam	[29]
12	Meenakshi Kaul	[9]
13	Didier Keymeulen	[33] [34] [38]
14	Vyas Krishnan	[31] [32] [35] [37] [39]
15	Nand Kumar	[2] [3]
16	Hao Li	[20] [25]
17	Wai-Kei Mak	[20] [25]
18	Mohammad Mojarradi	[38]
19	Joseph Neff	[34]
20	Frank Novak	[33]
21	Leo Rader	[2]
22	Ramesh Rajagopalan	[1]
23	Rajeshuni Ramesham	[33] [34]
24	N. Ranganathan (Nagarajan Ranganathan)	[36]
25	Jay Roy	[4] [9]
26	Soumyaroop Roy	[36]
27	Hariharan Sankaran	[28] [29] [41]
28	Adrian Stoica	[33] [34] [38]
29	Ranga Vemuri	[2] [3] [4] [5] [7] [9]
30	Ricardo Salem Zebulum	[33] [34] [38]

Colors in the list of coauthors