| 2007 | ||
|---|---|---|
| 21 | Fareed Zaffar, Gershon Kedem: A Service Architecture for Countering Distributed Denial of Service Attacks. AINA Workshops (1) 2007: 36-42 | |
| 2006 | ||
| 20 | Ashish Gehani, Surendar Chandra, Gershon Kedem: Augmenting storage with an intrusion response primitive to ensure the security of critical data. ASIACCS 2006: 114-124 | |
| 2005 | ||
| 19 | Fareed Zaffar, Gershon Kedem, Ashish Gehani: Paranoid: A Global Secure File Access Control System. ACSAC 2005: 322-332 | |
| 2004 | ||
| 18 | Ashish Gehani, Gershon Kedem: RheoStat: Real-Time Risk Management. RAID 2004: 296-314 | |
| 2000 | ||
| 17 | Haifeng Yu, Gershon Kedem: DRAM-Page Based Prediction and Prefetching. ICCD 2000: 267-275 | |
| 1996 | ||
| 16 | Thomas Alexander, Gershon Kedem: Distributed Prefetch-buffer/Cache Design for High-Performance Memory Systems. HPCA 1996: 254-263 | |
| 1995 | ||
| 15 | Thomas Alexander, John L. Ellis, Gershon Kedem: A Solid Translation Engine using Ray Representation. ASAP 1995: 157-165 | |
| 1991 | ||
| 14 | Jack V. Briner Jr., John L. Ellis, Gershon Kedem: Breaking the Barrier of Parallel Simulation of Digital Systems. DAC 1991: 223-226 | |
| 13 | Sujit Dey, Franc Brglez, Gershon Kedem: Partitioning Sequential Circuits for Logic Optimization. ICCD 1991: 70-76 | |
| 12 | John L. Ellis, Gershon Kedem, T. C. Lyerly, D. G. Thielman, R. J. Marisa, Jai Menon, Herbert B. Voelcker: The Ray casting engine and Ray representatives. Symposium on Solid Modeling and Applications 1991: 255-267 | |
| 11 | Sujit Dey, Franc Brglez, Gershon Kedem: Identification and Resynthesis of Pipelines in Sequential Networks. VLSI 1991: 439-449 | |
| 10 | John L. Ellis, Gershon Kedem, T. C. Lyerly, D. G. Thielman, R. J. Marisa, Jai Menon, Herbert B. Voelcker: The ray casting engine and ray representations: a technical summary. Int. J. Comput. Geometry Appl. 1(4): 347-380 (1991) | |
| 1990 | ||
| 9 | Sujit Dey, Franc Brglez, Gershon Kedem: Corolla Based Circuit Partitioning and Resynthesis. DAC 1990: 607-612 | |
| 1989 | ||
| 8 | Franc Brglez, Gershon Kedem, Clay Gloster: Hardware-Based Weighted Random Pattern Generation for Boundary Scan. ITC 1989: 264-274 | |
| 7 | Peter Ramyalal Suaris, Gershon Kedem: A quadrisection-based combined place and route scheme for standard cells. IEEE Trans. on CAD of Integrated Circuits and Systems 8(3): 234-244 (1989) | |
| 1987 | ||
| 6 | J. Apte, Gershon Kedem: Strip Layout: A New Layout Methodology for Standard Circuit Modules. DAC 1987: 363-369 | |
| 1985 | ||
| 5 | Pierre J. Malraison, Gershon Kedem, Greg Lee, Donald Meagher: Solid modeling with hardware (panel session). SIGGRAPH 1985: 328 | |
| 1984 | ||
| 4 | Gershon Kedem, Hiroyuki Watanabe: Graph-Optimization Techniques for IC Layout and Compaction. IEEE Trans. on CAD of Integrated Circuits and Systems 3(1): 12-20 (1984) | |
| 1983 | ||
| 3 | Gershon Kedem, Hiroyuki Watanabe: Graph-optimization techniques for IC layout and compaction. DAC 1983: 113-120 | |
| 1982 | ||
| 2 | Gershon Kedem: The quad-CIF tree: A data structure for hierarchical on-line algorithms. DAC 1982: 352-357 | |
| 1980 | ||
| 1 | Gershon Kedem: Automatic Differentiation of Computer Programs. ACM Trans. Math. Softw. 6(2): 150-165 (1980) | |
| 1 | Thomas Alexander | [15] [16] |
| 2 | J. Apte | [6] |
| 3 | Franc Brglez | [8] [9] [11] [13] |
| 4 | Jack V. Briner Jr. | [14] |
| 5 | Surendar Chandra | [20] |
| 6 | Sujit Dey | [9] [11] [13] |
| 7 | John L. Ellis | [10] [12] [14] [15] |
| 8 | Ashish Gehani | [18] [19] [20] |
| 9 | Clay S. Gloster Jr. (Clay Gloster) | [8] |
| 10 | Greg Lee | [5] |
| 11 | T. C. Lyerly | [10] [12] |
| 12 | Pierre J. Malraison | [5] |
| 13 | R. J. Marisa | [10] [12] |
| 14 | Donald Meagher | [5] |
| 15 | Jai Menon | [10] [12] |
| 16 | Peter Suaris (Peter Ramyalal Suaris) | [7] |
| 17 | D. G. Thielman | [10] [12] |
| 18 | Herbert B. Voelcker | [10] [12] |
| 19 | Hiroyuki Watanabe | [3] [4] |
| 20 | Haifeng Yu | [17] |
| 21 | Fareed Zaffar | [19] [21] |
Colors in the list of coauthors
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