V. Kheterpal Coauthor index DBLP Vis pubzone.org

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DBLP keys2005
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLV. Kheterpal, V. Rovner, T. G. Hersan, D. Motiani, Y. Takegawa, Andrzej J. Strojwas, Lawrence T. Pileggi: Design methodology for IC manufacturability based on regular logic-bricks. DAC 2005: 353-358
2004
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLV. Kheterpal, Andrzej J. Strojwas, Lawrence T. Pileggi: Routing architecture exploration for regular fabrics. DAC 2004: 204-207
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAneesh Koorapaty, V. Kheterpal, Padmini Gopalakrishnan, M. Fu, Lawrence T. Pileggi: Exploring Logic Block Granularity for Regular Fabrics. DATE 2004: 468-473
2003
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, V. Rovner, K. Y. Tong: Exploring regular fabrics to optimize the performance-cost trade-off. DAC 2003: 782-787
2002
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLB. Rajendran, V. Kheterpal, A. Das, J. Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti: Timing analysis of tree-like RLC circuits. ISCAS (4) 2002: 838-841

Coauthor Index

1P. P. Chakrabarti (Partha Pratim Chakrabarti) [1]
2A. Das [1]
3M. Fu [3]
4Padmini Gopalakrishnan [2] [3]
5T. G. Hersan [5]
6Aneesh Koorapaty [2] [3]
7J. Majumder [1]
8Chittaranjan A. Mandal (Chitta Mandal) [1]
9D. Motiani [5]
10Chetan Patel [2]
11Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) [2] [3] [4] [5]
12B. Rajendran [1]
13V. Rovner [2] [5]
14Herman Schmit [2]
15Andrzej J. Strojwas [2] [4] [5]
16Y. Takegawa [5]
17K. Y. Tong [2]

Colors in the list of coauthors

Copyright © Mon Dec 7 15:48:47 2009 by Michael Ley (ley@uni-trier.de)