Bart Kienhuis

	2009
30		Sven van Haastregt, Bart Kienhuis: Automated synthesis of streaming C applications to process networks in hardware. DATE 2009: 890-893
29		Barbara M. Chapman, Bart Kienhuis, Eduard Ayguadé, François Bodin, Oscar G. Plata, Eric Stotzer: Introduction. Euro-Par 2009: 837-838
	2008
28		Bin Jiang, Ed F. Deprettere, Bart Kienhuis: Hierarchical run time deadlock detection in process networks. SiPS 2008: 239-244
27		Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere: Deriving efficient control in Process Networks with Compaan/Laura. IJES 3(3): 170-180 (2008)
	2007
26		Sjoerd Meijer, Bart Kienhuis, Alexandru Turjan, Erwin A. de Kock: Interactive presentation: A process splitting transformation for Kahn process networks. DATE 2007: 1355-1360
25		Sjoerd Meijer, Bart Kienhuis, Johan Walters, David Snuijf: Automatic partitioning and mapping of stream-based applications onto the Intel IXP Network processor. SCOPES 2007: 23-30
24		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: Classifying interprocess communication in process network representation of nested-loop programs. ACM Trans. Embedded Comput. Syst. 6(2): (2007)
23		Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Bart Kienhuis, Ed F. Deprettere: Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing 55(6-2): 3126-3138 (2007)
	2005
22		Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere: Expression Synthesis in Process Networks generated by LAURA. ASAP 2005: 15-21
21		Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere: Communication Synthesis in a multiprocessor environment. FPL 2005: 360-365
20		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: Solving Out-of-Order Communication in Kahn Process Networks. VLSI Signal Processing 40(1): 7-18 (2005)
	2004
19		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks. ASAP 2004: 282-292
18		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: Translating affine nested-loop programs to process networks. CASES 2004: 220-229
17		Todor Stefanov, Claudiu Zissulescu, Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: System Design Using Kahn Process Networks: The Compaan/Laura Approach. DATE 2004: 340-345
16		Ingrid Verbauwhede, Patrick Schaumont, Christian Piguet, Bart Kienhuis: Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing. DATE 2004: 988-995
15		Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere: Increasing Pipelined IP Core Utilization in Process Networks Using Exploration. FPL 2004: 690-699
14		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: An Integer Linear Programming Approach to Classify the Communication in Process Networks. SCOPES 2004: 62-76
	2003
13		Alexandru Turjan, Bart Kienhuis: Storage Management in Process Networks using the Lexicographically Maximal Preimage. ASAP 2003: 75-85
12		Claudiu Zissulescu, Todor Stefanov, Bart Kienhuis, Ed F. Deprettere: Laura: Leiden Architecture Research and Exploration Tool. FPL 2003: 911-920
11		Bart Kienhuis, Ed F. Deprettere: Modeling Stream-Based Applications Using the SBF Model of Computation. VLSI Signal Processing 34(3): 291-300 (2003)
	2002
10		Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere: A Compile Time Based Approach for Solving Out-of-Order Communication in Kahn Process Networks. ASAP 2002: 17-28
9		Todor Stefanov, Bart Kienhuis, Ed F. Deprettere: Algorithmic transformation techniques for efficient exploration of alternative application instances. CODES 2002: 7-12
8		Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees A. Vissers: A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. Embedded Processor Design Challenges 2002: 18-37
7		Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis: Translating Imperative Affine Nested Loop Programs into Process Networks. Embedded Processor Design Challenges 2002: 89-111
	2000
6		Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis: High Level Modeling for Parallel Executions of Nested Loop Algorithms. ASAP 2000: 79-91
5		Bart Kienhuis, Edwin Rijpkema, Ed F. Deprettere: Compaan: deriving process networks from Matlab for embedded signal processing architectures. CODES 2000: 13-17
4		Edwin Rijpkema, Ed F. Deprettere, Bart Kienhuis: Deriving Process Networks from Nested Loop Algorithms. Parallel Processing Letters 10(2/3): 165-176 (2000)
	1999
3		Paul Lieverse, Ed F. Deprettere, Bart Kienhuis, Erwin A. de Kock: A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures. VLSI Signal Processing 22(1): 9-20 (1999)
	1998
2		Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf: The construction of a retargetable simulator for an architecture template. CODES 1998: 125-129
	1997
1		Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf: An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. ASAP 1997: 338-349

Coauthor Index

1	Eduard Ayguadé	[29]
2	Shuvra S. Bhattacharyya	[23]
3	François Bodin	[29]
4	Barbara M. Chapman	[29]
5	Ed F. Deprettere	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15] [17] [18] [19] [20] [21] [22] [23] [24] [27] [28]
6	Steven Derrien	[27]
7	Sven van Haastregt	[30]
8	Bin Jiang	[28]
9	Ming-Yung Ko	[23]
10	Erwin A. de Kock	[3] [26]
11	Paul Lieverse	[3] [6]
12	Sjoerd Meijer	[25] [26]
13	Christian Piguet	[16]
14	Oscar G. Plata	[29]
15	Sebastian Puthenpurayil	[23]
16	Edwin Rijpkema	[4] [5] [6] [7]
17	Patrick Schaumont	[16]
18	David Snuijf	[25]
19	Todor Stefanov	[9] [12] [17]
20	Eric Stotzer	[29]
21	Alexandru Turjan	[10] [13] [14] [17] [18] [19] [20] [24] [26] [27]
22	Ingrid Verbauwhede	[16]
23	Kees A. Vissers	[1] [2] [8]
24	Johan Walters	[25]
25	Pieter van der Wolf	[1] [2] [8]
26	Claudiu Zissulescu	[12] [15] [17] [21] [22] [23] [27]

Colors in the list of coauthors