| 2008 |
|---|
| 7 | EE | Debasish Das,
Kip Killpack,
Chandramouli V. Kashyap,
Abhijit Jas,
Hai Zhou:
Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering.
ASP-DAC 2008: 486-491 |
| 6 | EE | Pouria Bastani,
Kip Killpack,
Li-C. Wang,
Eli Chiprout:
Speedpath prediction based on learning from a small set of examples.
DAC 2008: 217-222 |
| 2007 |
|---|
| 5 | EE | Debasish Das,
Ahmed Shebaita,
Yehea I. Ismail,
Hai Zhou,
Kip Killpack:
NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits.
ACM Great Lakes Symposium on VLSI 2007: 25-30 |
| 4 | EE | Kip Killpack,
Chandramouli V. Kashyap,
Eli Chiprout:
Silicon Speedpath Measurement and Feedback into EDA flows.
DAC 2007: 390-395 |
| 2006 |
|---|
| 3 | EE | Chirayu S. Amin,
Chandramouli V. Kashyap,
Noel Menezes,
Kip Killpack,
Eli Chiprout:
A multi-port current source model for multiple-input switching effects in CMOS library cells.
DAC 2006: 247-252 |
| 2 | EE | Debasish Das,
Ahmed Shebaita,
Hai Zhou,
Yehea I. Ismail,
Kip Killpack:
FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling.
ICCD 2006 |
| 2005 |
|---|
| 1 | EE | Chirayu S. Amin,
Noel Menezes,
Kip Killpack,
Florentin Dartu,
Umakanta Choudhury,
Nagib Hakim,
Yehea I. Ismail:
Statistical static timing analysis: how simple can we get?
DAC 2005: 652-657 |
