| 2004 | ||
|---|---|---|
| 1 | Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, Heung Soo Kim: Design of Quaternary Logic Gate Using Double Pass-Transistor Logic with Neuron MOS Down Literal Circuit. ISMVL 2004: 198-203 | |
| 1 | Soo Jin Park | [1] |
| 2 | Byoung Hee Yoon | [1] |
| 3 | Kwang Sub Yoon | [1] |