 | 2009 |
| 14 |  | Hong Bo Che,
Hyoun Soo Park,
Jin Wook Kim,
Young Hwan Kim:
Realizable Reduction of RC Networks with Current Sources for Dynamic IR-Drop Analysis of Power Networks of SoCs.
IEICE Transactions 92-A(2): 475-480 (2009) |
| 13 |  | Hong Bo Che,
Jin Wook Kim,
Tae Il Bae,
Young Hwan Kim:
Accelerating Relaxation Using Dynamic Error Prediction.
IEICE Transactions 92-A(2): 648-651 (2009) |
| 2008 |
| 12 |  | Tae Il Bae,
Jin Wook Kim,
Young Hwan Kim:
New Gate Models for Gate-Level Delay Calculation under Crosstalk Effects.
IEICE Transactions 91-A(12): 3488-3496 (2008) |
| 11 |  | Hyoun Soo Park,
Wook Kim,
Dai Joon Hyun,
Young Hwan Kim:
Timing Criticality for Timing Yield Optimization.
IEICE Transactions 91-A(12): 3497-3505 (2008) |
| 2007 |
| 10 |  | Jong Suk Lee,
Jae Woon Lee,
Young Hwan Kim:
Symmetric Discharge Logic against Differential Power Analysis.
IEICE Transactions 90-A(1): 234-240 (2007) |
| 9 |  | Myung Jin Park,
Hyoun Soo Park,
Young Hwan Kim:
Image Adaptive Incremental Subfield Coding for Plasma Display Panels.
IEICE Transactions 90-C(11): 2100-2104 (2007) |
| 8 |  | Kyung Tae Do,
Young Hwan Kim,
Haeng Seon Son:
Timing modeling of latch-controlled sub-systems.
Integration 40(2): 62-73 (2007) |
| 2006 |
| 7 |  | Hyoun Soo Park,
Bong Hyun Lee,
Young Hwan Kim:
Level Converting Flip-Flops for High-Speed and Low-Power Applications.
IEICE Transactions 89-A(6): 1740-1743 (2006) |
| 6 |  | Jong Suk Lee,
Bong Seok Kang,
Young Hwan Kim:
Image-Dependent Code Optimization to Improve Motion Picture Quality of Plasma Displays.
IEICE Transactions 89-C(10): 1400-1405 (2006) |
| 2005 |
| 5 |  | Bong Hyun Lee,
Young Hwan Kim,
Kwang-Ok Jeong:
Clock-Free MTCMOS Flip-Flops with High Speed and Low Power.
IEICE Transactions 88-A(6): 1416-1424 (2005) |
| 2003 |
| 4 |  | Chang Sup Sung,
Young Hwan Kim:
Minimizing due date related performance measures on two batch processing machines.
European Journal of Operational Research 147(3): 644-656 (2003) |
| 2002 |
| 3 |  | Chang Sup Sung,
Young Hwan Kim:
Minimizing makespan in a two-machine flowshop with dynamic arrivals allowed.
Computers & OR 29(3): 275-294 (2002) |
| 1989 |
| 2 |  | Young Hwan Kim,
Seung Ho Hwang,
A. Richard Newton:
Electrical-logic simulation and its applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(1): 8-22 (1989) |
| 1986 |
| 1 |  | Seung Ho Hwang,
Young Hwan Kim,
A. Richard Newton:
An accuration delay modeling technique for switch-level timing verification.
DAC 1986: 227-233 |