Junji Kitamichi

	2008
13		Junji Kitamichi, Koji Ueda, Kenichi Kuroda: A Modeling of a Dynamically Reconfigurable Processor Using SystemC. VLSI Design 2008: 91-96
12		Kenji Asano, Junji Kitamichi, Kenichi Kuroda: Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems. JCP 3(2): 55-62 (2008)
	2007
11		Shuichi Watanabe, Junji Kitamichi, Kenichi Kuroda: A Hardware Algorithm for the Minimum p-Quasi Clique Cover Problem. FPL 2007: 139-144
10		Kenji Asano, Junji Kitamichi, Kenichi Kuroda: Proposal of Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems. VLSI Design 2007: 373-378
	2005
9		Toshiyuki Ito, Junji Kitamichi, Kenichi Kuroda, Yuichi Okuyama: A Master-Slave Adaptive Load-Distribution Processor Model on PCA. IPDPS 2005
	2001
8		Atsushi Fukada, Akio Nakata, Junji Kitamichi, Teruo Higashino, Ana R. Cavalli: A Conformance Testing Method for Communication Protocols Modeled as Concurrent DFSMs. ICOIN 2001: 155-162
	1999
7		Takashi Takenaka, Junji Kitamichi, Teruo Higashino, Kenichi Taniguchi: Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution. ASP-DAC 1999: 177-180
6		Junji Kitamichi, Hiroyuki Kageyama, Nobuo Funabiki: Formal Verification Method for Combinatorial Circuits at High Level Design. ASP-DAC 1999: 319-
5		Nobuo Funabiki, M. Yoda, Junji Kitamichi, Seishi Nishikawa: A gradual neural network approach for FPGA segmented channel routing problems. IEEE Transactions on Systems, Man, and Cybernetics, Part B 29(4): 481-489 (1999)
	1998
4		Nobuo Funabiki, Junji Kitamichi: A gradual neural-network algorithm for jointly time-slot/code assignment problems in packet radio networks. IEEE Transactions on Neural Networks 9(6): 1523-1528 (1998)
3		Nobuo Funabiki, Junji Kitamichi, Seishi Nishikawa: An evolutionary neural network approach for module orientation problems. IEEE Transactions on Systems, Man, and Cybernetics, Part B 28(6): 849-855 (1998)
	1994
2		Teruo Higashino, Keiichi Yasumoto, Junji Kitamichi, Kenichi Taniguchi: Hardware synthesis from a restricted class of LOTOS expressions. PSTV 1994: 379-386
1		Junji Kitamichi, Sumio Morioka, Teruo Higashino, Kenichi Taniguchi: Automatic Correctness Proof of the Implementation of Synchronous Sequential Circuits Using an Algebraic Approach. TPCD 1994: 165-184

Coauthor Index

1	Kenji Asano	[10] [12]
2	Ana R. Cavalli	[8]
3	Atsushi Fukada	[8]
4	Nobuo Funabiki	[3] [4] [5] [6]
5	Teruo Higashino	[1] [2] [7] [8]
6	Toshiyuki Ito	[9]
7	Hiroyuki Kageyama	[6]
8	Kenichi Kuroda	[9] [10] [11] [12] [13]
9	Sumio Morioka	[1]
10	Akio Nakata	[8]
11	Seishi Nishikawa	[3] [5]
12	Yuichi Okuyama	[9]
13	Takashi Takenaka	[7]
14	Kenichi Taniguchi	[1] [2] [7]
15	Koji Ueda	[13]
16	Shuichi Watanabe	[11]
17	Keiichi Yasumoto	[2]
18	M. Yoda	[5]

Colors in the list of coauthors