K. Y. Ko

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2002

3 K. Y. Ko, Mike W. T. Wong, Y. S. Lee: Testing System-On-Chip by Summations of Cores? Test Output Voltages. Asian Test Symposium 2002: 350-355

2 Mike W. T. Wong, K. Y. Ko, Y. S. Lee: Analog and Mixed-Signal IP Cores Testing. DELTA 2002: 3-7

2000

1 K. Y. Ko, Mike W. T. Wong: New built-in self-test technique based on addition/subtraction of selected node voltages. Asian Test Symposium 2000: 39-

	2002
3		K. Y. Ko, Mike W. T. Wong, Y. S. Lee: Testing System-On-Chip by Summations of Cores? Test Output Voltages. Asian Test Symposium 2002: 350-355
2		Mike W. T. Wong, K. Y. Ko, Y. S. Lee: Analog and Mixed-Signal IP Cores Testing. DELTA 2002: 3-7
	2000
1		K. Y. Ko, Mike W. T. Wong: New built-in self-test technique based on addition/subtraction of selected node voltages. Asian Test Symposium 2000: 39-

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