 | 2008 |
|---|
| 6 |       | Yasuhiro Kobayashi,
Masanori Hariyama,
Michitaka Kameyama:
Memory Allocation for Multi-Resolution Image Processing.
IEICE Transactions 91-D(10): 2386-2397 (2008) |
| 2006 |
|---|
| 5 | | Masanori Hariyama,
Michitaka Kameyama,
Yasuhiro Kobayashi:
Optimal Periodical Memory Allocation for Logic-in-Memory Image Processors.
ISVLSI 2006: 193-198 |
| 2005 |
|---|
| 4 | | Masanori Hariyama,
Yasuhiro Kobayashi,
Haruka Sasaki,
Michitaka Kameyama:
FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture.
IEICE Transactions 88-A(12): 3516-3522 (2005) |
| 1992 |
|---|
| 3 |  | Takayasu Kasahara,
Naoyuki Yamada,
Yasuhiro Kobayashi,
Katsuyuki Yoshino,
Kikuo Yoshimura:
Automatic Generation of a Domain Specific Inference Program for Building a Knowledge Processing System.
FGCS 1992: 1084-1090 |
| 2 | | Takayasu Kasahra,
Naoyuki Yamada,
Yasuhiro Kobayashi,
Katsuyuki Yoshino,
Kikuo Yoshimura:
Domain Model for Constructing a Knowledge Based System.
ICTAI 1992: 467-468 |
| 1986 |
|---|
| 1 | | Kenichi Yoshida,
Yasuhiro Kobayashi,
Yoshikatsu Ueda,
Hideo Tanaka,
Shouichi Muto,
Junichi Yoshizawa:
A Knowledge-Based Layout Design System for Industrial Plants.
FJCC 1986: 216-221 |
