| 2006 | ||
|---|---|---|
| 3 | Rajan Konar, Rajarshee P. Bharadwaj, Dinesh Bhatia, Poras T. Balsara: Exploring Logic Block Granularity in Leakage Tolerant FPGA. VLSI Design 2006: 754-757 | |
| 2005 | ||
| 2 | Rajarshee P. Bharadwaj, Rajan Konar, Poras T. Balsara, Dinesh Bhatia: Exploiting temporal idleness to reduce leakage power in programmable architectures. ASP-DAC 2005: 651-656 | |
| 1 | Rajarshee P. Bharadwaj, Rajan Konar, Dinesh Bhatia, Poras T. Balsara: FPGA Architecture for Standby Power Management. FPT 2005: 181-188 | |
| 1 | Poras T. Balsara | [1] [2] [3] |
| 2 | Rajarshee P. Bharadwaj | [1] [2] [3] |
| 3 | Dinesh Bhatia | [1] [2] [3] |