 | 2002 |
|---|
| 6 |       | Javier Martín-Langerwerf,
Carsten Reuter,
Holger Kropp,
Peter Pirsch:
Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications.
IEEE International Workshop on Rapid System Prototyping 2002: 60-65 |
| 2000 |
|---|
| 5 | | Holger Kropp,
Carsten Reuter:
A Mapping Methodology for Code Trees onto LUT-Based FPGAs.
FPL 2000: 221-229 |
| 1999 |
|---|
| 4 |  | Holger Kropp,
Carsten Reuter,
Matthias Wiege,
Tien-Toan Do,
Peter Pirsch:
An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes.
FPL 1999: 333-338 |
| 1998 |
|---|
| 3 | | Tien-Toan Do,
Holger Kropp,
Carsten Reuter,
Peter Pirsch:
A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs.
FPL 1998: 441-445 |
| 2 | | Holger Kropp,
Carsten Reuter,
Peter Pirsch:
The Video and Image Processing Emulation System VIPES.
International Workshop on Rapid System Prototyping 1998: 170-175 |
| 1997 |
|---|
| 1 | | Tien-Toan Do,
Holger Kropp,
Markus Schwiegershausen,
Peter Pirsch:
Implementation of pipelined multipliers on Xilinx FPGAs.
FPL 1997: 51-60 |
